Refactoring of builtins and annotations in the back-end.

Before, the back-end languages had distinct instructions
- Iannot for annotations, taking structured expressions (annot_arg)
  as arguments, and producing no results'
- Ibuiltin for other builtins, using simple pseudoregs/locations/registers
  as arguments and results.

This branch enriches Ibuiltin instructions so that they take structured
expressions (builtin_arg and builtin_res) as arguments and results.
This way,
- Annotations fit the general pattern of builtin functions,
  so Iannot instructions are removed.
- EF_vload_global and EF_vstore_global become useless, as the
  same optimization can be achieved by EF_vload/vstore taking
  a structured argument of the "address of global" kind.
- Better code can be generated for builtin_memcpy between stack locations,
  or volatile accesses to stack locations.

Finally, this commit also introduces a new kind of external function,
EF_debug, which is like EF_annot but produces no observable events.
It will be used later to transport debug info through the back-end,
without preventing optimizations.

1 files changed, 36 insertions, 0 deletions

diff --git a/backend/Registers.v b/backend/Registers.v
index 47e10fa4..20532e8c 100644
--- a/backend/Registers.v
+++ b/backend/Registers.v
@@ -22,6 +22,7 @@ Require Import AST.
 Require Import Maps.
 Require Import Ordered.
 Require FSetAVL.
+Require Import Values.
 
 Definition reg: Type := positive.
 
@@ -53,10 +54,45 @@ Definition regmap_optset
   | Some r => Regmap.set r v rs
   end.
 
+Definition regmap_setres
+    (A: Type) (res: builtin_res reg) (v: A) (rs: Regmap.t A) : Regmap.t A :=
+  match res with
+  | BR r => Regmap.set r v rs
+  | _ => rs
+  end.
+
 Notation "a # b" := (Regmap.get b a) (at level 1).
 Notation "a ## b" := (List.map (fun r => Regmap.get r a) b) (at level 1).
 Notation "a # b <- c" := (Regmap.set b c a) (at level 1, b at next level).
 
+(** Pointwise "less defined than" relation between register maps. *)
+
+Definition regs_lessdef (rs1 rs2: Regmap.t val) : Prop :=
+  forall r, Val.lessdef (rs1#r) (rs2#r).
+
+Lemma regs_lessdef_regs:
+  forall rs1 rs2, regs_lessdef rs1 rs2 ->
+  forall rl, Val.lessdef_list rs1##rl rs2##rl.
+Proof.
+  induction rl; constructor; auto.
+Qed.
+
+Lemma set_reg_lessdef:
+  forall r v1 v2 rs1 rs2,
+  Val.lessdef v1 v2 -> regs_lessdef rs1 rs2 -> regs_lessdef (rs1#r <- v1) (rs2#r <- v2).
+Proof.
+  intros; red; intros. repeat rewrite Regmap.gsspec. 
+  destruct (peq r0 r); auto.
+Qed.
+
+Lemma set_res_lessdef:
+  forall res v1 v2 rs1 rs2,
+  Val.lessdef v1 v2 -> regs_lessdef rs1 rs2 ->
+  regs_lessdef (regmap_setres res v1 rs1) (regmap_setres res v2 rs2).
+Proof.
+  intros. destruct res; simpl; auto. apply set_reg_lessdef; auto.
+Qed.
+
 (** Sets of registers *)
 
 Module Regset := FSetAVL.Make(OrderedPositive).