Merge pull request #40 from AbsInt/inline-asm

GCC-style extended inline asm.

The subset implemented is:

- zero or one output
- output constraints "=r" (to register) or "=m" (to memory)
- zero, one or several inputs
- input constraints "r" (in register), "m" (in memory), "i" and "n" (compile-time integer constant)
- clobbered registers (the 3rd argument)
- both anonymous (%3) and named (%[name]) operands
- modifiers %R and %Q to refer to the most significant / least significant part of a register pair holding a 64-bit integer. (Undocumented GCC ARM feature.)

All asm statements are treated as "volatile", possibly modifying memory and condition codes.

1 files changed, 5 insertions, 1 deletions

diff --git a/cparser/Cleanup.ml b/cparser/Cleanup.ml
index 09eaff9b..254f6fed 100644
--- a/cparser/Cleanup.ml
+++ b/cparser/Cleanup.ml
@@ -78,6 +78,8 @@ let add_decl (sto, id, ty, init) =
   add_typ ty;
   match init with None -> () | Some i -> add_init i
 
+let add_asm_operand (lbl, cstr, e) = add_exp e
+
 let rec add_stmt s =
   match s.sdesc with
   | Sskip -> ()
@@ -98,7 +100,9 @@ let rec add_stmt s =
   | Sreturn(Some e) -> add_exp e
   | Sblock sl -> List.iter add_stmt sl
   | Sdecl d -> add_decl d
-  | Sasm _ -> ()
+  | Sasm(attr, template, outputs, inputs, flags) ->
+      List.iter add_asm_operand outputs;
+      List.iter add_asm_operand inputs
 
 let add_fundef f =
   add_typ f.fd_ret;