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| author | Xavier Leroy <xavier.leroy@inria.fr> | 2017-04-28 15:56:59 +0200 |
|---|---|---|
| committer | Xavier Leroy <xavier.leroy@inria.fr> | 2017-04-28 16:05:51 +0200 |
| commit | f642817f0dc761e51c3bd362f75b0068a8d4b0c8 (patch) | |
| tree | b5830bb772611d2271c4b7d26f162d5c200dd788 /cparser/Machine.ml | |
| parent | 2fbdb0c45f0913b9fd8e95606c525fc5bfb3bc6d (diff) | |
| download | compcert-kvx-f642817f0dc761e51c3bd362f75b0068a8d4b0c8.tar.gz compcert-kvx-f642817f0dc761e51c3bd362f75b0068a8d4b0c8.zip | |
RISC-V port and assorted changes
This commits adds code generation for the RISC-V architecture, both in 32- and 64-bit modes.
The generated code was lightly tested using the simulator and cross-binutils from https://riscv.org/software-tools/
This port required the following additional changes:
- Integers: More properties about shrx
- SelectOp: now provides smart constructors for mulhs and mulhu
- SelectDiv, 32-bit integer division and modulus: implement constant propagation, use the new smart constructors mulhs and mulhu.
- Runtime library: if no asm implementation is provided, run the reference C implementation through CompCert. Since CompCert rejects the definitions of names of special functions such as __i64_shl, the reference implementation now uses "i64_" names, e.g. "i64_shl", and a renaming "i64_ -> __i64_" is performed over the generated assembly file, before assembling and building the runtime library.
- test/: add SIMU make variable to run tests through a simulator
- test/regression/alignas.c: make sure _Alignas and _Alignof are not #define'd by C headers
commit da14495c01cf4f66a928c2feff5c53f09bde837f
Author: Xavier Leroy <xavier.leroy@inria.fr>
Date: Thu Apr 13 17:36:10 2017 +0200
RISC-V port, continued
Now working on Asmgen.
commit 36f36eb3a5abfbb8805960443d087b6a83e86005
Author: Xavier Leroy <xavier.leroy@inria.fr>
Date: Wed Apr 12 17:26:39 2017 +0200
RISC-V port, first steps
This port is based on Prashanth Mundkur's experimental RV32 port and brings it up to date with CompCert, and adds 64-bit support (RV64). Work in progress.
Diffstat (limited to 'cparser/Machine.ml')
| -rw-r--r-- | cparser/Machine.ml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/cparser/Machine.ml b/cparser/Machine.ml index 364ebf28..4df80125 100644 --- a/cparser/Machine.ml +++ b/cparser/Machine.ml @@ -180,6 +180,11 @@ let arm_bigendian = { arm_littleendian with bigendian = true; bitfields_msb_first = true } +let rv32 = + { ilp32ll64 with name = "rv32" } +let rv64 = + { i32lpll64 with name = "rv64" } + (* Add GCC extensions re: sizeof and alignof *) let gcc_extensions c = |