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| author | David Monniaux <david.monniaux@univ-grenoble-alpes.fr> | 2020-07-10 21:39:37 +0200 |
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| committer | David Monniaux <david.monniaux@univ-grenoble-alpes.fr> | 2020-07-10 21:39:37 +0200 |
| commit | 7abe728fea66e04db905df7fc1899904690560af (patch) | |
| tree | 9b61dee74cc208da6687b77fa068361a273f23c1 /kvx | |
| parent | 0392f0a7ef44ddbe6c5a75fc5b89a83e9add035c (diff) | |
| download | compcert-kvx-7abe728fea66e04db905df7fc1899904690560af.tar.gz compcert-kvx-7abe728fea66e04db905df7fc1899904690560af.zip | |
relaxing
Diffstat (limited to 'kvx')
| -rw-r--r-- | kvx/lib/PrepassSchedulingOracle.ml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/kvx/lib/PrepassSchedulingOracle.ml b/kvx/lib/PrepassSchedulingOracle.ml index cd8f321f..4d70d0aa 100644 --- a/kvx/lib/PrepassSchedulingOracle.ml +++ b/kvx/lib/PrepassSchedulingOracle.ml @@ -135,7 +135,7 @@ let get_simple_dependencies (seqa : (instruction*Regset.t) array) = add_input_regs i inputs; add_output_reg i (latency_of_op op (List.length inputs)) output | Iload(trap, chunk, addressing, addr_regs, output, _) -> - set_branch i; + irreversible_action i; add_input_mem i; add_input_regs i addr_regs; add_output_reg i (latency_of_load trap chunk addressing (List.length addr_regs)) output |