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| author | Cyril SIX <cyril.six@kalray.eu> | 2019-03-01 17:41:27 +0100 |
|---|---|---|
| committer | Cyril SIX <cyril.six@kalray.eu> | 2019-03-01 17:41:27 +0100 |
| commit | 59948b3348964f4b16f408ffe690f2c78ca80959 (patch) | |
| tree | 5bffab7d0225ca82abd1fde068d80ad78c30b651 /mppa_k1c/PostpassSchedulingOracle.ml | |
| parent | 5f7252105c9c639078ca3cc313502c647779d2f8 (diff) | |
| download | compcert-kvx-59948b3348964f4b16f408ffe690f2c78ca80959.tar.gz compcert-kvx-59948b3348964f4b16f408ffe690f2c78ca80959.zip | |
Added double comparisons
Diffstat (limited to 'mppa_k1c/PostpassSchedulingOracle.ml')
| -rw-r--r-- | mppa_k1c/PostpassSchedulingOracle.ml | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/mppa_k1c/PostpassSchedulingOracle.ml b/mppa_k1c/PostpassSchedulingOracle.ml index d9c22666..db50e3a5 100644 --- a/mppa_k1c/PostpassSchedulingOracle.ml +++ b/mppa_k1c/PostpassSchedulingOracle.ml @@ -56,6 +56,7 @@ let arith_rrr_str = function | Pcompw it -> "Pcompw" | Pcompl it -> "Pcompl" | Pfcompw ft -> "Pfcompw" + | Pfcompl ft -> "Pfcompl" | Paddw -> "Paddw" | Psubw -> "Psubw" | Pmulw -> "Pmulw" @@ -378,7 +379,7 @@ type real_instruction = | Fabsd | Fabsw | Fnegw | Fnegd | Faddd | Faddw | Fsbfd | Fsbfw | Fmuld | Fmulw | Fnarrowdw | Fwidenlwd | Floatwz | Floatuwz | Floatdz | Floatudz | Fixedwz | Fixeduwz | Fixeddz | Fixedudz - | Fcompw + | Fcompw | Fcompd let ab_inst_to_real = function | "Paddw" | "Paddiw" | "Pcvtl2w" -> Addw @@ -388,6 +389,7 @@ let ab_inst_to_real = function | "Pcompw" | "Pcompiw" -> Compw | "Pcompl" | "Pcompil" -> Compd | "Pfcompw" -> Fcompw + | "Pfcompl" -> Fcompd | "Pmulw" -> Mulw | "Pmull" -> Muld | "Porw" | "Poriw" -> Orw @@ -480,6 +482,9 @@ let rec_to_usage r = | Fcompw -> (match encoding with None -> alu_lite | Some U6 | Some S10 | Some U27L5 -> alu_lite_x | _ -> raise InvalidEncoding) + | Fcompd -> (match encoding with None -> alu_lite + | Some U6 | Some S10 | Some U27L5 -> alu_lite_x + | _ -> raise InvalidEncoding) | Make -> (match encoding with Some U6 | Some S10 -> alu_tiny | Some U27L5 | Some U27L10 -> alu_tiny_x | Some E27U27L10 -> alu_tiny_y @@ -512,7 +517,7 @@ let real_inst_to_latency = function | Nop -> 0 (* Only goes through ID *) | Addw | Andw | Compw | Orw | Sbfw | Sraw | Srlw | Sllw | Xorw | Addd | Andd | Compd | Ord | Sbfd | Srad | Srld | Slld | Xord | Make - | Sxwd | Zxwd | Fcompw + | Sxwd | Zxwd | Fcompw | Fcompd -> 1 | Floatwz | Floatuwz | Fixeduwz | Fixedwz | Floatdz | Floatudz | Fixeddz | Fixedudz -> 4 | Mulw | Muld -> 2 (* FIXME - WORST CASE. If it's S10 then it's only 1 *) |