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| author | David Monniaux <david.monniaux@univ-grenoble-alpes.fr> | 2019-05-02 09:45:55 +0200 |
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| committer | David Monniaux <david.monniaux@univ-grenoble-alpes.fr> | 2019-05-02 09:45:55 +0200 |
| commit | 8058d6a89fe0cfda16f685ef5a96793b95cc4156 (patch) | |
| tree | be0be3400453ad64313432b0c580234114788846 /mppa_k1c/PostpassSchedulingOracle.ml | |
| parent | 7962808d192f2b4d88e8ff1135e3f6e75cf8dea9 (diff) | |
| parent | 98206d8c97cf9ecdff8d892ecafb9a9fa8455f74 (diff) | |
| download | compcert-kvx-8058d6a89fe0cfda16f685ef5a96793b95cc4156.tar.gz compcert-kvx-8058d6a89fe0cfda16f685ef5a96793b95cc4156.zip | |
Merge branch 'mppa-xsaddr' into mppa-work
Diffstat (limited to 'mppa_k1c/PostpassSchedulingOracle.ml')
| -rw-r--r-- | mppa_k1c/PostpassSchedulingOracle.ml | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/mppa_k1c/PostpassSchedulingOracle.ml b/mppa_k1c/PostpassSchedulingOracle.ml index b63dcb6c..abc3dcb6 100644 --- a/mppa_k1c/PostpassSchedulingOracle.ml +++ b/mppa_k1c/PostpassSchedulingOracle.ml @@ -216,15 +216,15 @@ let arith_rec i = | PArithR (i, rd) -> arith_r_rec i (IR rd) let load_rec i = match i with - | PLoadRRO (i, rs1, rs2, imm) -> { inst = load_str i; write_locs = [Reg (IR rs1)]; read_locs = [Mem; Reg (IR rs2)]; imm = (Some (Off imm)) - ; is_control = false} - | PLoadRRR (i, rs1, rs2, rs3) -> { inst = load_str i; write_locs = [Reg (IR rs1)]; read_locs = [Mem; Reg (IR rs2); Reg (IR rs3)]; imm = None - ; is_control = false} + | PLoadRRO (i, rs1, rs2, imm) -> + { inst = load_str i; write_locs = [Reg (IR rs1)]; read_locs = [Mem; Reg (IR rs2)]; imm = (Some (Off imm)) ; is_control = false} + | PLoadRRR (i, rs1, rs2, rs3) | PLoadRRRXS (i, rs1, rs2, rs3) -> + { inst = load_str i; write_locs = [Reg (IR rs1)]; read_locs = [Mem; Reg (IR rs2); Reg (IR rs3)]; imm = None ; is_control = false} let store_rec i = match i with | PStoreRRO (i, rs1, rs2, imm) -> { inst = store_str i; write_locs = [Mem]; read_locs = [Reg (IR rs1); Reg (IR rs2)]; imm = (Some (Off imm)) ; is_control = false} - | PStoreRRR (i, rs1, rs2, rs3) -> { inst = store_str i; write_locs = [Mem]; read_locs = [Reg (IR rs1); Reg (IR rs2); Reg (IR rs3)]; imm = None + | PStoreRRR (i, rs1, rs2, rs3) | PStoreRRRXS (i, rs1, rs2, rs3) -> { inst = store_str i; write_locs = [Mem]; read_locs = [Reg (IR rs1); Reg (IR rs2); Reg (IR rs3)]; imm = None ; is_control = false} let get_rec (rd:gpreg) rs = { inst = get_str; write_locs = [Reg (IR rd)]; read_locs = [Reg rs]; imm = None; is_control = false } |