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| author | Cyril SIX <cyril.six@kalray.eu> | 2018-04-17 17:28:51 +0200 |
|---|---|---|
| committer | Cyril SIX <cyril.six@kalray.eu> | 2018-04-17 17:28:51 +0200 |
| commit | eb3fd167668695c33f776cbb381c7664c3ec1858 (patch) | |
| tree | e7bcfaa9fc18a8755d8fa983d3e8a8d18f1d89f1 /mppa_k1c/TargetPrinter.ml | |
| parent | 139595171a98e6722503202a2a8fb7c000f267c2 (diff) | |
| download | compcert-kvx-eb3fd167668695c33f776cbb381c7664c3ec1858.tar.gz compcert-kvx-eb3fd167668695c33f776cbb381c7664c3ec1858.zip | |
MPPA - Added Pmull -> now able to run the sort test
Diffstat (limited to 'mppa_k1c/TargetPrinter.ml')
| -rw-r--r-- | mppa_k1c/TargetPrinter.ml | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/mppa_k1c/TargetPrinter.ml b/mppa_k1c/TargetPrinter.ml index cb3b558c..4c3bf3c6 100644 --- a/mppa_k1c/TargetPrinter.ml +++ b/mppa_k1c/TargetPrinter.ml @@ -216,6 +216,8 @@ module Target : TARGET = | Pmulw(rd, rs1, rs2) -> fprintf oc " mulw %a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 + | Pmull(rd, rs1, rs2) -> + fprintf oc " muld %a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 | Psrliw (rd, rs, imm) -> fprintf oc " srlw %a = %a, %a\n;;\n" ireg rd ireg rs coqint64 imm |