aboutsummaryrefslogtreecommitdiffstats
path: root/powerpc
diff options
context:
space:
mode:
authorDavid Monniaux <David.Monniaux@univ-grenoble-alpes.fr>2021-10-29 21:56:59 +0200
committerDavid Monniaux <David.Monniaux@univ-grenoble-alpes.fr>2021-10-29 21:56:59 +0200
commitae2d228c04f4fca1e281b146764646cbdd7d6b1d (patch)
tree244f88aebc77a9ca2ef7e69731deb1dfee434ece /powerpc
parente19d179d1f30d5893e5f30dbd33188350656831e (diff)
parentd194e47a7d494944385ff61c194693f8a67787cb (diff)
downloadcompcert-kvx-ae2d228c04f4fca1e281b146764646cbdd7d6b1d.tar.gz
compcert-kvx-ae2d228c04f4fca1e281b146764646cbdd7d6b1d.zip
Merge remote-tracking branch 'origin/master' into towards_3.10
Diffstat (limited to 'powerpc')
-rw-r--r--powerpc/Asmgen.v4
-rw-r--r--powerpc/Asmgenproof.v6
-rw-r--r--powerpc/Asmgenproof1.v2
-rw-r--r--powerpc/Machregs.v4
-rw-r--r--powerpc/Op.v39
5 files changed, 33 insertions, 22 deletions
diff --git a/powerpc/Asmgen.v b/powerpc/Asmgen.v
index 924773e7..eafb6d3c 100644
--- a/powerpc/Asmgen.v
+++ b/powerpc/Asmgen.v
@@ -183,7 +183,9 @@ Definition andimm64 (r1 r2: ireg) (n: int64) (k : code) :=
andimm64_base r1 r2 n k.
Definition rolm64 (r1 r2: ireg) (amount: int) (mask: int64) (k: code) :=
- if is_rldl_mask mask || is_rldr_mask mask || is_rldl_mask (Int64.shru' mask amount) then
+ if is_rldl_mask mask || is_rldr_mask mask
+ || (let mask' := Int64.shru' mask amount in
+ Int64.eq mask (Int64.shl' mask' amount) && is_rldl_mask mask') then
Prldinm r1 r2 amount mask :: k
else
Prldinm r1 r2 amount Int64.mone :: andimm64_base r1 r1 mask k.
diff --git a/powerpc/Asmgenproof.v b/powerpc/Asmgenproof.v
index e25ae583..b6b5c678 100644
--- a/powerpc/Asmgenproof.v
+++ b/powerpc/Asmgenproof.v
@@ -294,10 +294,10 @@ Opaque Int.eq.
- unfold xorimm64, opimm64. destruct Int64.eq. TailNoLabel.
destruct ireg_eq; [apply tail_nolabel_cons; unfold nolabel;auto|]; eapply tail_nolabel_trans; TailNoLabel.
- unfold rolm64, andimm64_base, opimm64.
- destruct (is_rldl_mask i0 || is_rldr_mask i0 || is_rldl_mask (Int64.shru' i0 i)). TailNoLabel.
- apply tail_nolabel_cons; unfold nolabel; auto.
+ destruct orb.
+ TailNoLabel.
destruct Int64.eq. TailNoLabel.
- destruct ireg_eq; [apply tail_nolabel_cons; unfold nolabel;auto|]; eapply tail_nolabel_trans; TailNoLabel.
+ destruct ireg_eq; TailNoLabel; eapply tail_nolabel_trans; TailNoLabel.
- eapply transl_cond_op_label; eauto.
- destruct (preg_of r); monadInv H. eapply transl_select_op_label; eauto. eapply transl_fselect_op_label; eauto.
Qed.
diff --git a/powerpc/Asmgenproof1.v b/powerpc/Asmgenproof1.v
index cc9fc1a7..c0651bf9 100644
--- a/powerpc/Asmgenproof1.v
+++ b/powerpc/Asmgenproof1.v
@@ -788,7 +788,7 @@ Lemma rolm64_correct:
/\ forall r': preg, r' <> r1 -> r' <> GPR12 -> important_preg r' = true -> rs'#r' = rs#r'.
Proof.
intros. unfold rolm64.
- destruct (is_rldl_mask mask || is_rldr_mask mask || is_rldl_mask (Int64.shru' mask amount)).
+ destruct orb.
- econstructor; split. eapply exec_straight_one. simpl; reflexivity. reflexivity.
intuition Simpl.
- edestruct (andimm64_base_correct r1 r1 mask k) as (rs2 & A & B & C); auto.
diff --git a/powerpc/Machregs.v b/powerpc/Machregs.v
index 9967bbae..eeca880a 100644
--- a/powerpc/Machregs.v
+++ b/powerpc/Machregs.v
@@ -75,9 +75,9 @@ Proof.
intros. specialize (H r). InvBooleans. auto.
Qed.
-Instance Decidable_eq_mreg : forall (x y: mreg), Decidable (eq x y) := Decidable_eq mreg_eq.
+Global Instance Decidable_eq_mreg : forall (x y: mreg), Decidable (eq x y) := Decidable_eq mreg_eq.
-Instance Finite_mreg : Finite mreg := {
+Global Instance Finite_mreg : Finite mreg := {
Finite_elements := all_mregs;
Finite_elements_spec := all_mregs_complete
}.
diff --git a/powerpc/Op.v b/powerpc/Op.v
index 505b7545..0b379883 100644
--- a/powerpc/Op.v
+++ b/powerpc/Op.v
@@ -1367,53 +1367,62 @@ Definition is_rlw_mask (x: int) : bool :=
is_mask_rec rlw_transition rlw_accepting Int.wordsize RLW_S0 (Int.unsigned x).
(** For the 64-bit [rldicl] and [rldicr] instructions, the acceptable
- masks are [1111100000] and [0000011111], that is, some ones in the
- high bits and some zeroes in the low bits, or conversely. All ones
- is OK, but not all zeroes. The corresponding automata are:
-<<
- 0 1
- / \ / \
- \ / \ / (accepting: [1])
- [0] --1--> [1]
+ masks are (in big endian):
+- for [rldicl]: masks that clear the leftmost bits (most significant bits),
+ that is, [00000011111], that is, ones in the low bits followed by zeros
+ in the high bits;
+- for [rldicr]: masks that clear the rightmost bits (least significant bits),
+ that is, [11110000000], that is, zeros in the low bits followed by ones
+ in the high bits.
+ All ones is OK, but not all zeroes.
+ The corresponding automata for [rldicl] is
+<<
1 0
/ \ / \
\ / \ / (accepting: [1], [2])
[0] --1--> [1] --0--> [2]
>>
+ The automata for [rldicr] is
+<<
+ 0 1
+ / \ / \
+ \ / \ / (accepting: [1])
+ [0] --1--> [1]
+>>
*)
-Inductive rll_state: Type := RLL_S0 | RLL_S1 | RLL_Sbad.
+Inductive rll_state: Type := RLL_S0 | RLL_S1 | RLL_S2 | RLL_Sbad.
Definition rll_transition (s: rll_state) (b: bool) : rll_state :=
match s, b with
- | RLL_S0, false => RLL_S0
| RLL_S0, true => RLL_S1
+ | RLL_S1, false => RLL_S2
| RLL_S1, true => RLL_S1
+ | RLL_S2, false => RLL_S2
| _, _ => RLL_Sbad
end.
Definition rll_accepting (s: rll_state) : bool :=
match s with
- | RLL_S1 => true
+ | RLL_S1 | RLL_S2 => true
| _ => false
end.
-Inductive rlr_state: Type := RLR_S0 | RLR_S1 | RLR_S2 | RLR_Sbad.
+Inductive rlr_state: Type := RLR_S0 | RLR_S1 | RLR_Sbad.
Definition rlr_transition (s: rlr_state) (b: bool) : rlr_state :=
match s, b with
+ | RLR_S0, false => RLR_S0
| RLR_S0, true => RLR_S1
- | RLR_S1, false => RLR_S2
| RLR_S1, true => RLR_S1
- | RLR_S2, false => RLR_S2
| _, _ => RLR_Sbad
end.
Definition rlr_accepting (s: rlr_state) : bool :=
match s with
- | RLR_S1 | RLR_S2 => true
+ | RLR_S1 => true
| _ => false
end.