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authorLéo Gourdin <leo.gourdin@univ-grenoble-alpes.fr>2021-03-02 10:29:23 +0100
committerLéo Gourdin <leo.gourdin@univ-grenoble-alpes.fr>2021-03-02 10:29:23 +0100
commitbe4dcbd9fcd3c859a0fae7a37cd226493a8abefb (patch)
tree3d69513c3f082e7db01bd9ade327c0ebc8a2f441 /riscV/Asmgenproof1.v
parentfd1a0395e540ee9fcd91d8f09161b34a22d9c51e (diff)
parenta9763cd4327e12316d62e80648122f122581cca4 (diff)
downloadcompcert-kvx-be4dcbd9fcd3c859a0fae7a37cd226493a8abefb.tar.gz
compcert-kvx-be4dcbd9fcd3c859a0fae7a37cd226493a8abefb.zip
Merge remote-tracking branch 'origin/riscV-cmov' into riscv-work
Diffstat (limited to 'riscV/Asmgenproof1.v')
-rw-r--r--riscV/Asmgenproof1.v48
1 files changed, 48 insertions, 0 deletions
diff --git a/riscV/Asmgenproof1.v b/riscV/Asmgenproof1.v
index a826455e..1b3a0dbf 100644
--- a/riscV/Asmgenproof1.v
+++ b/riscV/Asmgenproof1.v
@@ -1268,6 +1268,54 @@ Opaque Int.eq.
split; intros; Simpl.
all: destruct (rs x0); auto.
all: destruct (rs x1); auto.
+ exists rs'; split; eauto. rewrite B; auto with asmgen.
+- (* shrxlimm *)
+ destruct (Val.shrxl (rs x0) (Vint n)) eqn:TOTAL.
+ {
+ exploit Val.shrxl_shrl_3; eauto. intros E; subst v.
+ destruct (Int.eq n Int.zero).
++ econstructor; split. apply exec_straight_one. simpl; eauto. auto.
+ split; intros; Simpl.
++ destruct (Int.eq n Int.one).
+ * econstructor; split.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ apply exec_straight_one. simpl; reflexivity. auto.
+ split; intros; Simpl.
+
+ * change (Int.repr 64) with Int64.iwordsize'. set (n' := Int.sub Int64.iwordsize' n).
+ econstructor; split.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ apply exec_straight_one. simpl; reflexivity. auto.
+ split; intros; Simpl.
+ }
+ destruct (Int.eq n Int.zero).
++ econstructor; split. apply exec_straight_one. simpl; eauto. auto.
+ split; intros; Simpl.
++ destruct (Int.eq n Int.one).
+ * econstructor; split.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ apply exec_straight_one. simpl; reflexivity. auto.
+ split; intros; Simpl.
+
+ * change (Int.repr 64) with Int64.iwordsize'. set (n' := Int.sub Int64.iwordsize' n).
+ econstructor; split.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ eapply exec_straight_step. simpl; reflexivity. auto.
+ apply exec_straight_one. simpl; reflexivity. auto.
+ split; intros; Simpl.
+
+- (* cond *)
+ exploit transl_cond_op_correct; eauto. intros (rs' & A & B & C).
+ exists rs'; split. eexact A. eauto with asmgen.
+- (* select *)
+ econstructor; split. apply exec_straight_one. simpl; eauto. auto.
+ split; intros; Simpl.
+ apply Val.lessdef_normalize.
Qed.
(** Memory accesses *)