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authorXavier Leroy <xavier.leroy@inria.fr>2017-04-29 19:57:04 +0200
committerXavier Leroy <xavier.leroy@inria.fr>2017-04-29 19:57:04 +0200
commit38898389f48baac4a319c973d77bb6e69f98d502 (patch)
treebbf8a50a8a1952c07aa94487e862016fdf934e81 /runtime/riscV
parentf2fe37ccc79649dbb622b1bf2d0d144f2e0a5768 (diff)
downloadcompcert-kvx-38898389f48baac4a319c973d77bb6e69f98d502.tar.gz
compcert-kvx-38898389f48baac4a319c973d77bb6e69f98d502.zip
RISC-V vararg.S: a "sw" instruction should be "sptr"
Diffstat (limited to 'runtime/riscV')
-rw-r--r--runtime/riscV/vararg.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/runtime/riscV/vararg.S b/runtime/riscV/vararg.S
index a9481077..a3bdc320 100644
--- a/runtime/riscV/vararg.S
+++ b/runtime/riscV/vararg.S
@@ -75,7 +75,7 @@ FUNCTION(__compcert_va_float64)
lptr t5, 0(a0) # t5 = pointer to next argument
addi t5, t5, 15 # 8-align and advance by 8
and t5, t5, -8
- sw t5, 0(a0) # update ap
+ sptr t5, 0(a0) # update ap
fld fa0, -8(t5) # return it in fa0
jr ra
ENDFUNCTION(__compcert_va_float64)