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authorSylvain Boulmé <sylvain.boulme@univ-grenoble-alpes.fr>2021-05-28 15:24:16 +0200
committerSylvain Boulmé <sylvain.boulme@univ-grenoble-alpes.fr>2021-05-28 15:24:16 +0200
commitb79d0a04787d9234cf580841bf58e592fe4ab3ee (patch)
treed1bef8184071e30612178cfc53c820e59b1e0675 /scheduling/BTL_Livecheck.v
parent25595a7b34b70011dcb77aae277ee1cdb8920c60 (diff)
downloadcompcert-kvx-b79d0a04787d9234cf580841bf58e592fe4ab3ee.tar.gz
compcert-kvx-b79d0a04787d9234cf580841bf58e592fe4ab3ee.zip
starting to extend RTLtoBTL with Liveness checking (on BTL side)
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+Require Import Coqlib Maps.
+Require Import AST Integers Values Events Memory Globalenvs Smallstep Op Registers OptionMonad.
+Require Import Errors RTL BTL BTLmatchRTL.
+
+(** TODO: adapt stuff RTLpathLivegen *)
+
+Definition liveness_checker (f: BTL.function): res unit := OK tt. (* TODO: implement this ! *)
+
+Definition liveness_ok_function (f: BTL.function): Prop := liveness_checker f = OK tt.
+
+(** TODO: adapt stuff RTLpathLivegenproof *)
+
+Local Notation ext alive := (fun r => Regset.In r alive).
+
+Lemma regset_add_spec live r1 r2: Regset.In r1 (Regset.add r2 live) <-> (r1 = r2 \/ Regset.In r1 live).
+Proof.
+ destruct (Pos.eq_dec r1 r2).
+ - subst. intuition; eapply Regset.add_1; auto.
+ - intuition.
+ * right. eapply Regset.add_3; eauto.
+ * eapply Regset.add_2; auto.
+Qed.
+
+Definition eqlive_reg (alive: Regset.elt -> Prop) (rs1 rs2: regset): Prop :=
+ forall r, (alive r) -> rs1#r = rs2#r.
+
+(* continue to adapt stuff RTLpathLivegenproof *)
+
+Section FSEM_SIMULATES_CFGSEM.
+
+Variable prog: BTL.program.
+
+Let ge := Genv.globalenv prog.
+
+Hypothesis liveness_checker_correct: forall b f, Genv.find_funct_ptr ge b = Some (Internal f) -> liveness_ok_function f.
+
+Theorem cfgsem2fsem: forward_simulation (cfgsem prog) (fsem prog).
+Proof.
+ exploit liveness_checker_correct.
+Admitted.
+
+End FSEM_SIMULATES_CFGSEM.
+
+