Make prepass scheduling sensitive to register pressure, by Nicolas Nardino.

Squashed commit of the following:

commit cf033ec29391d5358dea1d3b25da1738957478c4
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 18:01:03 2021 +0200

    comment for authors

commit 2ff766a18432fd75739abab0b5741ded6b67a2a5
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 15:29:25 2021 +0200

    activate register pressure by default

commit 67f4ae2b702cc95ed7cef67b726e15abbf18e768
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 15:26:03 2021 +0200

    use a more recognizable option name

commit 6121be54b80a55fdadd8b64dfad53357148c9090
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 14:13:50 2021 +0200

    fix for KVX

commit 43d4932e8ba9e00eb8c8788c86f56b6bddd46392
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 13:28:26 2021 +0200

    setup registers

commit 169a221104c37737f12abe79711009fc0d88ce09
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 13:00:56 2021 +0200

    rm useless code

commit d6a846b641787ea6a5ed113b1d7275ffb5028d9c
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 12:54:19 2021 +0200

    rm "Admitted"

commit fd4d085aa988a6044f89fc17e8422be23bc87f9d
Merge: 70f5867e 56498b64
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 12:30:25 2021 +0200

    Merge remote-tracking branch 'origin/kvx-work' into kvx-sched-w-reg-press

commit 70f5867e441e253869cb3b432af77636a186d1cb
Author: David Monniaux <David.Monniaux@univ-grenoble-alpes.fr>
Date:   Fri Jul 16 12:26:27 2021 +0200

    rm TODO

commit f86f5df47b69053702661671340b0fcb31506aa3
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jul 8 11:22:17 2021 +0200

    add more debug info

commit a4a0b36f56a94c19da301265a4e3acad1fbdf6c4
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jul 8 11:20:49 2021 +0200

    Deactivate sched validator (i think)

commit af97fca0f1d824f3becf9c6895f44ad234e262f8
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jul 6 15:32:35 2021 +0200

    Add debug info

commit b96a48de58e1969535865b7b345514a24f7178a6
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Mon Jun 28 16:04:44 2021 +0200

    Change temporary solution (see prev commits), and add option for it

commit 9ac49c465f9c8969fba00e6242da0c188a6a3080
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Fri Jun 25 09:42:41 2021 +0200

    Changed printfs into debugs

commit dfa09586ae40c70769eeda688a0e7f59f611749f
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jun 24 18:33:20 2021 +0200

    Another scheduler

commit c5e8595480604c78260017cc771b0e4195fdd182
Merge: 10cbe4b2 cf2aa686
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 22 15:58:10 2021 +0200

    Merge branch 'kvx-sched-w-reg-press' of gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into kvx-sched-w-reg-press

commit 10cbe4b28ef6dc5d02c9a5d4d369484e4943a18d
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 22 15:57:21 2021 +0200

    Changed default threshold value following tests

commit cf2aa686bcf9a823562fe977df6dd778d5467985
Merge: eddbce33 fe557bf6
Author: David Monniaux <david.monniaux@univ-grenoble-alpes.fr>
Date:   Thu Jun 17 17:05:30 2021 +0200

    Merge branch 'kvx-sched-w-reg-press' of gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into kvx-sched-w-reg-press

commit eddbce33e28c49bf7b9e83ebd5dbf6cb0d770090
Merge: 8f399dfa fae8d9b5
Author: David Monniaux <david.monniaux@univ-grenoble-alpes.fr>
Date:   Thu Jun 17 17:05:20 2021 +0200

    Merge branch 'kvx-sched-w-reg-press' of gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCert into kvx-sched-w-reg-press

commit 8f399dfa9d794f2f728f523ff1aa7788cc3599b2
Author: David Monniaux <david.monniaux@univ-grenoble-alpes.fr>
Date:   Thu Jun 17 17:04:52 2021 +0200

    fix for Risc-V

commit fe557bf65ec738eaa078bc5e398ff690eb1f2b9e
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jun 17 17:03:53 2021 +0200

    changed type of schedule_seq in x86 for compatibility

commit fae8d9b5c5f93d5eda36f800eb0ca1837b237cba
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jun 17 17:00:57 2021 +0200

    fix riscv/Machregsaux.mli

commit 9759e94256fd09f4995418b67b7aedbcf84b4b10
Merge: 4413c27d 04b2489d
Author: David Monniaux <david.monniaux@univ-grenoble-alpes.fr>
Date:   Thu Jun 17 16:52:09 2021 +0200

    Merge remote-tracking branch 'origin/kvx-work' into kvx-sched-w-reg-press

commit 4413c27d6c6a3d69df34955d9d453c38b32174c7
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jun 17 15:38:13 2021 +0200

    Add option to set thresold and support for riscv

commit 21278bd87e89210bcc287116f6e35fc1b52d0df2
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Wed Jun 16 20:27:31 2021 +0200

    Now working, tests show a decrease in spillage

    Should still find a proper way to treat the case mentioned in earlier
    commits

commit 87c82b6fcf2bf825a8c60fc6a95498aac9f826d4
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 15 14:44:56 2021 +0200

    kinda fixed

    Spills are definitely reduced, but lots of arbitrary in there:
    See previous commit: need to determine what to do if pressure is too
    high but no schedulable instruction can reduce it. For now, advance
    time for at most 5 cycles, if still no suitable instruction, go back
    to CSP

commit 19464b3992eadf7670acc7231896103ab54885e5
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 15 12:07:43 2021 +0200

    fixing

    Still need to find what to do when pressure is high but there are no
    instructions available that decrease it

commit bff4e6ff0b782619b6fcc18751fa575cbb11de68
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Mon Jun 14 17:39:58 2021 +0200

    was very wrong, fixing

commit 3eb3751f84348a20b7ce211fdbf1d01a9c4685a8
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Mon Jun 14 14:46:01 2021 +0200

    One fewer spill with new sched on `test/.../spille_forw.c`

commit 66e15205c40de54639387a4c9b1cc78994525d55
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Mon Jun 14 13:53:08 2021 +0200

    scheduler written, need to test now

commit 2b814b1f9bb30d9c8b59a713f69bced808bca7c7
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Sat Jun 12 10:52:59 2021 +0200

    work on the scheduler

commit 1701e43316ee8e69e794a025a8c9979af6bb8c93
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Thu Jun 10 16:31:51 2021 +0200

    Work on new schedluer

    Renamed a test file, wrote function to compute pressure deltas,
    Still need to pass the info in some way; beginning of the actual
    scheduler function

commit 386b9053177bb4ef2801cec00b717c400a828139
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 8 16:53:19 2021 +0200

    Fix RTLpathScheduleraux.get_live_regs_entry

commit 9b6247b7996f3e0181d27ec0e20daffd28e0884f
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 8 16:06:36 2021 +0200

    Another test : one spill when scheduled forward, none if not

commit 52378f0600652a94edcc8c78e4b426243f717a89
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Tue Jun 8 15:11:03 2021 +0200

    Add some tests

commit 2249f3c7771c285ccd25f6e94478be388a741da5
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Sun Jun 6 20:49:34 2021 +0200

    Adding debug info

commit 9118878bd14e24cc04c2f36cab7aa7271a0f1852
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Sun Jun 6 12:11:15 2021 +0200

    Fixing scope error, and non-exhaustive pattern matching

commit 599823a6410f1629f2b8704291839e0974bce83b
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Sat Jun 5 19:52:59 2021 +0200

    function written, now needs testing

commit 98a7a04258f2cf6caf9f18925cbeeae2f5b17be4
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Fri Jun 4 16:56:32 2021 +0200

    computing live regs at sb entry from its live output regs

commit 7ae1fb0faea68ce5cfe04a232e49659247c244e9
Author: nicolas.nardino <nicolas.nardino@ens-lyon.fr>
Date:   Fri Jun 4 14:24:07 2021 +0200

    Passing info of live regs to scheduler: beginning

3 files changed, 299 insertions, 0 deletions

diff --git a/test/nardino/scheduling/entry_regs.c b/test/nardino/scheduling/entry_regs.c
new file mode 100644
index 00000000..9e6adacb
--- /dev/null
+++ b/test/nardino/scheduling/entry_regs.c
@@ -0,0 +1,19 @@
+#include <stdio.h>
+
+int f(int n) {
+	if (n > 0) 
+		return 42;
+	else
+		return n;
+}
+
+
+int main(int argc, char *argv[]) {
+    int a=1;
+	float b=2.;
+	int c = f(a);
+	a = 3;
+	int d = f(a);
+	printf("%e, %d, %d, %d", b, a, c, d);
+    return 0;
+}
diff --git a/test/nardino/scheduling/spille_backw.c b/test/nardino/scheduling/spille_backw.c
new file mode 100644
index 00000000..1c36ee86
--- /dev/null
+++ b/test/nardino/scheduling/spille_backw.c
@@ -0,0 +1,114 @@
+int f(int k) {
+	int a1 = k;
+	int b1 = 2*a1;
+	int c = a1;
+	int a2 = k+1;
+	int b2 = 2*a2;
+	c += a2;
+	int a3 = k+2;
+	int b3 = 2*a3;
+	c += a3;
+	int a4 = k+3;
+	int b4 = 2*a4;
+	c += a4;
+	int a5 = k+4;
+	int b5 = 2*a5;
+	c += a5;
+	int a6 = k+5;
+	int b6 = 2*a6;
+	c += a6;
+	int a7 = k+6;
+	int b7 = 2*a7;
+	c += a7;
+	int a8 = k+7;
+	int b8 = 2*a8;
+	c += a8;
+	int a9 = k+8;
+	int b9 = 2*a9;
+	c += a9;
+	int a10 = k+9;
+	int b10 = 2*a10;
+	c += a10;
+	int a11 = k+10;
+	int b11 = 2*a11;
+	c += a11;
+	int a12 = k+11;
+	int b12 = 2*a12;
+	c += a12;
+	int a13 = k+12;
+	int b13 = 2*a13;
+	c += a13;
+	int a14 = k+13;
+	int b14 = 2*a14;
+	c += a14;
+	int a15 = k+14;
+	int b15 = 2*a15;
+	c += a15;
+	int a16 = k+15;
+	int b16 = 2*a16;
+	c += a16;
+	int a17 = k+16;
+	int b17 = 2*a17;
+	c += a17;
+	int a18 = k+17;
+	int b18 = 2*a18;
+	c += a18;
+	int a19 = k+18;
+	int b19 = 2*a19;
+	c += a19;
+	int a20 = k+19;
+	int b20 = 2*a20;
+	c += a20;
+	int a21 = k+20;
+	int b21 = 2*a21;
+	c += a21;
+	int a22 = k+21;
+	int b22 = 2*a22;
+	c += a22;
+	int a23 = k+22;
+	int b23 = 2*a23;
+	c += a23;
+	int a24 = k+23;
+	int b24 = 2*a24;
+	c += a24;
+	int a25 = k+24;
+	int b25 = 2*a25;
+	c += a25;
+	int a26 = k+25;
+	int b26 = 2*a26;
+	c += a26;
+	return
+		b13+	
+		b12+
+		b11+
+		b10+
+		b9+
+		b8+
+		b7+
+		b6+
+		b5+
+		b4+
+		b3+
+		b2+
+		b1+
+		b14+
+		b15+
+		b16+
+		b17+
+		b18+
+		b19+
+		b20+
+		b21+
+		b22+
+		b23+
+		b23+
+		b24+
+		b25+
+		b26+
+		c;
+}
+
+int main(int argc, char *argv[]) {
+	f(3);
+    return 0;
+}
diff --git a/test/nardino/scheduling/spille_forw.c b/test/nardino/scheduling/spille_forw.c
new file mode 100644
index 00000000..db88588b
--- /dev/null
+++ b/test/nardino/scheduling/spille_forw.c
@@ -0,0 +1,166 @@
+#include <stdio.h>
+
+int f(int n, float * arr) {
+	float a1 = (float) n;
+	float b1 = 2.*a1;
+	float c = a1;
+	float a2 = (float) n+1;
+	float b2 = 2.*a2;
+	c += a2;
+	float a3 = (float) n+2;
+	float b3 = 2.*a3;
+	c += a3;
+	float a4 = (float) n+3;
+	float b4 = 2.*a4;
+	c += a4;
+	float a5 = (float) n+4;
+	float b5 = 2.*a5;
+	c += a5;
+	float a6 = (float) n+5;
+	float b6 = 2.*a6;
+	c += a6;
+	float a7 = (float) n+6;
+	float b7 = 2.*a7;
+	c += a7;
+	float a8 = (float) n+7;
+	float b8 = 2.*a8;
+	c += a8;
+	float a9 = (float) n+8;
+	float b9 = 2.*a9;
+	c += a9;
+	float a10 = (float) n+9;
+	float b10 = 2.*a10;
+	c += a10;
+	float a11 = (float) n+10;
+	float b11 = 2.*a11;
+	c += a11;
+	float a12 = (float) n+11;
+	float b12 = 2.*a12;
+	c += a12;
+	float a13 = (float) n+12;
+	float b13 = 2.*a13;
+	c += a13;
+	float a14 = (float) n+13;
+	float b14 = 2.*a14;
+	c += a14;
+	float a15 = (float) n+14;
+	float b15 = 2.*a15;
+	c += a15;
+	float a16 = (float) n+15;
+	float b16 = 2.*a16;
+	c += a16;
+	float a17 = (float) n+16;
+	float b17 = 2.*a17;
+	c += a17;
+	float a18 = (float) n+17;
+	float b18 = 2.*a18;
+	c += a18;
+	float a19 = (float) n+18;
+	float b19 = 2.*a19;
+	c += a19;
+	float a20 = (float) n+19;
+	float b20 = 2.*a20;
+	c += a20;
+	float a21 = (float) n+20;
+	float b21 = 2.*a21;
+	c += a21;
+	float a22 = (float) n+21;
+	float b22 = 2.*a22;
+	c += a22;
+	float a23 = (float) n+22;
+	float b23 = 2.*a23;
+	c += a23;
+	float a24 = (float) n+23;
+	float b24 = 2.*a24;
+	c += a24;
+	float a25 = (float) n+24;
+	float b25 = 2.*a25;
+	c += a25;
+	float a26 = (float) n+25;
+	float b26 = 2.*a26;
+	c += a26;
+	float a27 = (float) n+26;
+	float b27 = 2.*a27;
+	c += a27;
+	float a28 = (float) n+27;
+	float b28 = 2.*a28;
+	c += a28;
+	float a29 = (float) n+28;
+	float b29 = 2.*a29;
+	c += a29;
+	float a30 = (float) n+29;
+	float b30 = 2.*a30;
+	c += a30;
+	/* arr[0] = a1; */
+	/* arr[1] = a2; */
+	/* arr[2] = a3; */
+	/* arr[3] = a4; */
+	/* arr[4] = a5; */
+	/* arr[5] = a6; */
+	/* arr[6] = a7; */
+	/* arr[7] = a8; */
+	/* arr[8] = a9; */
+	/* arr[9] = a10; */
+	/* arr[10] = a11; */
+	/* arr[11] = a12; */
+	/* arr[12] = a13; */
+	/* arr[13] = a14; */
+	/* arr[14] = a15; */
+	/* arr[15] = a16; */
+	/* arr[16] = a17; */
+	/* arr[17] = a18; */
+	/* arr[18] = a19; */
+	/* arr[19] = a20; */
+	/* arr[20] = a21; */
+	/* arr[21] = a22; */
+	/* arr[22] = a23; */
+	/* arr[23] = a24; */
+	/* arr[24] = a25; */
+	/* arr[25] = a26; */
+	/* arr[26] = a27; */
+	/* arr[27] = a28; */
+	/* arr[28] = a29; */
+	/* arr[29] = a30; */
+	return c +
+		b1+
+		b2+
+		b3+
+		b4+
+		b5+
+		b6+
+		b7+
+		b8+
+		b9+
+		b10+
+		b11+
+		b12+
+		b13+
+		b14+
+		b15+
+		b16+
+		b17+
+		b18+
+		b19+
+		b20+
+		b21+
+		b22+
+		b23+
+		b24+
+		b25+
+		b26+
+		b27+
+		b28+
+		b29+
+		b30;
+}
+
+
+
+
+
+
+int main(int argc, char *argv[]) {
+	float arr[30];
+    f(5, arr);
+    return 0;
+}