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authorXavier Leroy <xavierleroy@users.noreply.github.com>2019-09-11 15:13:12 +0200
committerGitHub <noreply@github.com>2019-09-11 15:13:12 +0200
commit7601fb5e792a5305336e5cda9794c4041d053b95 (patch)
treef0dc0acd7bb5ad6dae80e4389fb165fa93eb3cb8 /x86
parentd3eba50731c23546c6e9ccb14230460fc1da592e (diff)
parentc243b565ab0744086e10efcfee16768f6c3cf880 (diff)
downloadcompcert-kvx-7601fb5e792a5305336e5cda9794c4041d053b95.tar.gz
compcert-kvx-7601fb5e792a5305336e5cda9794c4041d053b95.zip
Merge pull request #313 from AbsInt/aarch64
Support target architecture AArch64 (ARMv8 in 64-bit mode)
Diffstat (limited to 'x86')
-rw-r--r--x86/SelectOpproof.v8
1 files changed, 4 insertions, 4 deletions
diff --git a/x86/SelectOpproof.v b/x86/SelectOpproof.v
index a1bb0703..961f602c 100644
--- a/x86/SelectOpproof.v
+++ b/x86/SelectOpproof.v
@@ -381,9 +381,9 @@ Proof.
- TrivialExists. simpl. rewrite Int.and_commut; auto.
- TrivialExists. simpl. rewrite Val.and_assoc. rewrite Int.and_commut. auto.
- rewrite Val.zero_ext_and. TrivialExists. rewrite Val.and_assoc.
- rewrite Int.and_commut. auto. compute; auto.
+ rewrite Int.and_commut. auto. omega.
- rewrite Val.zero_ext_and. TrivialExists. rewrite Val.and_assoc.
- rewrite Int.and_commut. auto. compute; auto.
+ rewrite Int.and_commut. auto. omega.
- TrivialExists.
Qed.
@@ -743,7 +743,7 @@ Proof.
red; intros until x. unfold cast8unsigned. destruct (cast8unsigned_match a); intros; InvEval.
TrivialExists.
subst. rewrite Val.zero_ext_and. rewrite Val.and_assoc.
- rewrite Int.and_commut. apply eval_andimm; auto. compute; auto.
+ rewrite Int.and_commut. apply eval_andimm; auto. omega.
TrivialExists.
Qed.
@@ -759,7 +759,7 @@ Proof.
red; intros until x. unfold cast16unsigned. destruct (cast16unsigned_match a); intros; InvEval.
TrivialExists.
subst. rewrite Val.zero_ext_and. rewrite Val.and_assoc.
- rewrite Int.and_commut. apply eval_andimm; auto. compute; auto.
+ rewrite Int.and_commut. apply eval_andimm; auto. omega.
TrivialExists.
Qed.