15 files changed, 440 insertions, 25 deletions

diff --git a/mppa_k1c/Asm.v b/mppa_k1c/Asm.v
index df394ecf..9de80a15 100644
--- a/mppa_k1c/Asm.v
+++ b/mppa_k1c/Asm.v
@@ -167,7 +167,66 @@ Inductive ex_instruction : Type :=
   | Pbuiltin: external_function -> list (builtin_arg preg)
               -> builtin_res preg -> ex_instruction   (**r built-in function (pseudo) *)
   (* Instructions not generated by Asmgen (most likely result of AsmExpand) *)
-  | Pclzll (rd rs: ireg)
+    (* BCU *)
+  | Pawait
+  | Pbarrier
+  | Pdoze
+  | Pwfxl (rs1 rs2: ireg)
+  | Pwfxm (rs1 rs2: ireg)
+  | Pinvaldtlb
+  | Pinvalitlb
+  | Pprobetlb
+  | Preadtlb
+  | Psleep
+  | Pstop
+  | Psyncgroup (rs: ireg)
+  | Ptlbwrite
+
+    (* LSU *)
+  | Pafda (rd rs1 rs2: ireg)
+  | Paldc (rd rs: ireg)
+  | Pdinval
+  | Pdinvall (rs: ireg)
+  | Pdtouchl (rs: ireg)
+  | Pdzerol (rs: ireg)
+  | Pfence
+  | Piinval
+  | Piinvals (rs: ireg)
+  | Pitouchl (rs: ireg)
+  | Plbsu (rd rs: ireg)
+  | Plbzu (rd rs: ireg)
+  | Pldu (rd rs: ireg)
+  | Plhsu (rd rs: ireg)
+  | Plhzu (rd rs: ireg)
+  | Plwzu (rd rs: ireg)
+
+    (* ALU *)
+  | Paddhp (rd rs1 rs2: ireg)
+  | Padds (rd rs1 rs2: ireg)
+  | Pbwlu (rd rs1 rs2 rs3 rs4 rs5: ireg)
+  | Pbwluhp (rd rs1 rs2 rs3: ireg)
+  | Pbwluwp (rd rs1 rs2 rs3: ireg)
+  | Pcbs (rd rs: ireg)
+  | Pcbsdl (rd rs: ireg)
+  | Pclz (rd rs: ireg)
+  | Pclzw (rd rs: ireg)
+  | Pclzd (rd rs: ireg)
+  | Pclzdl (rd rs: ireg)
+  | Pcmove (rd rs1 rs2 rs3: ireg)
+  | Pctz (rd rs: ireg)
+  | Pctzw (rd rs: ireg)
+  | Pctzd (rd rs: ireg)
+  | Pctzdl (rd rs: ireg)
+  | Pextfz (rd rs1 rs2 rs3: ireg)
+  | Plandhp (rd rs1 rs2 rs3: ireg)
+  | Psat (rd rs1 rs2: ireg)
+  | Psatd (rd rs1 rs2: ireg)
+  | Psbfhp (rd rs1 rs2: ireg)
+  | Psbmm8 (rd rs1 rs2: ireg)
+  | Psbmmt8 (rd rs1 rs2: ireg)
+  | Psllhps (rd rs1 rs2: ireg)
+  | Psrahps (rd rs1 rs2: ireg)
+  | Pstsu (rd rs1 rs2: ireg)
   | Pstsud (rd rs1 rs2: ireg)
 .
 
@@ -1056,8 +1115,68 @@ Definition exec_instr (f: function) (i: instruction) (rs: regset) (m: mem) : out
 
   (** The following instructions and directives are not generated directly by Asmgen,
       so we do not model them. *)
-  | Pclzll _ _
+    (* BCU *)
+  | Pawait
+  | Pbarrier
+  | Pdoze
+  | Pwfxl _ _
+  | Pwfxm _ _
+  | Pinvaldtlb
+  | Pinvalitlb
+  | Pprobetlb
+  | Preadtlb
+  | Psleep
+  | Pstop
+  | Psyncgroup _
+  | Ptlbwrite
+
+    (* LSU *)
+  | Pafda _ _ _
+  | Paldc _ _
+  | Pdinval
+  | Pdinvall _
+  | Pdtouchl _
+  | Pdzerol _
+  | Pfence
+  | Piinval
+  | Piinvals _
+  | Pitouchl _
+  | Plbsu _ _
+  | Plbzu _ _
+  | Pldu _ _
+  | Plhsu _ _
+  | Plhzu _ _
+  | Plwzu _ _
+
+    (* ALU *)
+  | Paddhp _ _ _
+  | Padds _ _ _
+  | Pbwlu _ _ _ _ _ _
+  | Pbwluhp _ _ _ _
+  | Pbwluwp _ _ _ _
+  | Pcbs _ _
+  | Pcbsdl _ _
+  | Pclz _ _
+  | Pclzw _ _
+  | Pclzd _ _
+  | Pclzdl _ _
+  | Pcmove _ _ _ _
+  | Pctz _ _
+  | Pctzw _ _
+  | Pctzd _ _
+  | Pctzdl _ _
+  | Pextfz _ _ _ _
+  | Plandhp _ _ _ _
+  | Psat _ _ _
+  | Psatd _ _ _
+  | Psbfhp _ _ _
+  | Psbmm8 _ _ _
+  | Psbmmt8 _ _ _
+  | Psllhps _ _ _
+  | Psrahps _ _ _
+  | Pstsu _ _ _
   | Pstsud _ _ _
+
     => Stuck
   end.
 
diff --git a/mppa_k1c/Asmexpand.ml b/mppa_k1c/Asmexpand.ml
index b3a1e836..951a7511 100644
--- a/mppa_k1c/Asmexpand.ml
+++ b/mppa_k1c/Asmexpand.ml
@@ -417,13 +417,77 @@ let expand_builtin_inline name args res =
   (* Synchronization *)
   | "__builtin_membar", [], _ ->
      ()
+  (* BCU *)
+  | "__builtin_k1_await", [], BR(IR _) -> emit (PExpand (Pawait))
+  | "__builtin_k1_barrier", [], BR(IR _) -> emit (PExpand (Pbarrier))
+  | "__builtin_k1_doze", [], BR(IR _) -> emit (PExpand (Pdoze))
+  | "__builtin_k1_wfxl", [BA(IR a1); BA(IR a2)], BR(IR _) -> emit (PExpand (Pwfxl(a1, a2)))
+  | "__builtin_k1_wfxm", [BA(IR a1); BA(IR a2)], BR(IR _) -> emit (PExpand (Pwfxm(a1, a2)))
+  | "__builtin_k1_invaldtlb", [], BR(IR _) -> emit (PExpand (Pinvaldtlb))
+  | "__builtin_k1_invalitlb", [], BR(IR _) -> emit (PExpand (Pinvalitlb))
+  | "__builtin_k1_probetlb", [], BR(IR _) -> emit (PExpand (Pprobetlb))
+  | "__builtin_k1_readtlb", [], BR(IR _) -> emit (PExpand (Preadtlb))
+  | "__builtin_k1_sleep", [], BR(IR _) -> emit (PExpand (Psleep))
+  | "__builtin_k1_stop", [], BR(IR _) -> emit (PExpand (Pstop))
+  | "__builtin_k1_syncgroup", [BA(IR a1)], BR(IR _) -> emit (PExpand (Psyncgroup(a1)))
+  | "__builtin_k1_tlbwrite", [], BR(IR _) -> emit (PExpand (Ptlbwrite))
+
+  (* LSU *)
+  | "__builtin_k1_afda", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Pafda(r, a1, a2)))
+  | "__builtin_k1_aldc", [BA(IR a1)], BR(IR r) -> emit (PExpand (Paldc(r, a1)))
+  | "__builtin_k1_dinval", [], BR(IR _) -> emit (PExpand (Pdinval))
+  | "__builtin_k1_dinvall", [BA(IR a1)], BR(IR _) -> emit (PExpand (Pdinvall(a1)))
+  | "__builtin_k1_dtouchl", [BA(IR a1)], BR(IR _) -> emit (PExpand (Pdtouchl(a1)))
+  | "__builtin_k1_dzerol", [BA(IR a1)], BR(IR _) -> emit (PExpand (Pdzerol(a1)))
+  | "__builtin_k1_fence", [], BR(IR _) -> emit (PExpand (Pfence))
+  | "__builtin_k1_iinval", [], BR(IR _) -> emit (PExpand (Piinval))
+  | "__builtin_k1_iinvals", [BA(IR a1)], BR(IR _) -> emit (PExpand (Piinvals(a1)))
+  | "__builtin_k1_itouchl", [BA(IR a1)], BR(IR _) -> emit (PExpand (Pitouchl(a1)))
+  | "__builtin_k1_lbsu", [BA(IR a1)], BR(IR r) -> emit (PExpand (Plbsu(r, a1)))
+  | "__builtin_k1_lbzu", [BA(IR a1)], BR(IR r) -> emit (PExpand (Plbzu(r, a1)))
+  | "__builtin_k1_ldu", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pldu(r, a1)))
+  | "__builtin_k1_lhsu", [BA(IR a1)], BR(IR r) -> emit (PExpand (Plhsu(r, a1)))
+  | "__builtin_k1_lhzu", [BA(IR a1)], BR(IR r) -> emit (PExpand (Plhzu(r, a1)))
+  | "__builtin_k1_lwzu", [BA(IR a1)], BR(IR r) -> emit (PExpand (Plwzu(r, a1)))
+
+  (* ALU *)
+  | "__builtin_k1_addhp", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Paddhp(r, a1, a2)))
+  | "__builtin_k1_adds", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Padds(r, a1, a2)))
+  | "__builtin_k1_bwlu", [BA(IR a1); BA(IR a2); BA(IR a3); BA(IR a4); BA(IR a5)], BR(IR r) -> 
+          emit (PExpand (Pbwlu(r, a1, a2, a3, a4, a5)))
+  | "__builtin_k1_bwluhp", [BA(IR a1); BA(IR a2); BA(IR a3);], BR(IR r) -> 
+          emit (PExpand (Pbwluhp(r, a1, a2, a3)))
+  | "__builtin_k1_bwluwp", [BA(IR a1); BA(IR a2); BA(IR a3);], BR(IR r) -> 
+          emit (PExpand (Pbwluwp(r, a1, a2, a3)))
+  | "__builtin_k1_cbs", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pcbs(r, a1)))
+  | "__builtin_k1_cbsdl", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pcbsdl(r, a1)))
+  | "__builtin_k1_clz", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pclz(r, a1)))
+  | "__builtin_k1_clzw", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pclzw(r, a1)))
+  | "__builtin_k1_clzd", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pclzd(r, a1)))
+  | "__builtin_k1_clzdl", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pclzdl(r, a1)))
+  | "__builtin_k1_cmove", [BA(IR a1); BA(IR a2); BA(IR a3);], BR(IR r) -> 
+          emit (PExpand (Pcmove(r, a1, a2, a3)))
+  | "__builtin_k1_ctz", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pctz(r, a1)))
+  | "__builtin_k1_ctzw", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pctzw(r, a1)))
+  | "__builtin_k1_ctzd", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pctzd(r, a1)))
+  | "__builtin_k1_ctzdl", [BA(IR a1)], BR(IR r) -> emit (PExpand (Pctzdl(r, a1)))
+  | "__builtin_k1_extfz", [BA(IR a1); BA(IR a2); BA(IR a3);], BR(IR r) -> 
+          emit (PExpand (Pextfz(r, a1, a2, a3)))
+  | "__builtin_k1_landhp", [BA(IR a1); BA(IR a2); BA(IR a3);], BR(IR r) -> 
+          emit (PExpand (Plandhp(r, a1, a2, a3)))
+  | "__builtin_k1_sat", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psat(r, a1, a2)))
+  | "__builtin_k1_satd", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psatd(r, a1, a2)))
+  | "__builtin_k1_sbfhp", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psbfhp(r, a1, a2)))
+  | "__builtin_k1_sbmm8", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psbmm8(r, a1, a2)))
+  | "__builtin_k1_sbmmt8", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psbmmt8(r, a1, a2)))
+  | "__builtin_k1_sllhps", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psllhps(r, a1, a2)))
+  | "__builtin_k1_srahps", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Psrahps(r, a1, a2)))
+  | "__builtin_k1_stsu", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Pstsu(r, a1, a2)))
+  | "__builtin_k1_stsud", [BA(IR a1); BA(IR a2)], BR(IR r) -> emit (PExpand (Pstsud(r, a1, a2)))
+
   (* Vararg stuff *)
   | "__builtin_va_start", [BA(IR a)], _ ->
      expand_builtin_va_start a
-  | "__builtin_clzll", [BA(IR a)], BR(IR res) ->
-     emit (PExpand (Pclzll(res, a)))
-  | "__builtin_k1_stsud", [BA(IR a1); BA(IR a2)], BR(IR res) ->
-     emit (PExpand (Pstsud(res, a1, a2)))
   (* Byte swaps *)
 (*| "__builtin_bswap16", [BA(IR a1)], BR(IR res) ->
      expand_bswap16 res a1
diff --git a/mppa_k1c/CBuiltins.ml b/mppa_k1c/CBuiltins.ml
index b478f9b3..a5bdaa28 100644
--- a/mppa_k1c/CBuiltins.ml
+++ b/mppa_k1c/CBuiltins.ml
@@ -21,13 +21,75 @@ let builtins = {
   Builtins.typedefs = [
     "__builtin_va_list", TPtr(TVoid [], [])
   ];
-  Builtins.functions = [
-    "__builtin_clzll",
-      (TInt(IInt, []), 
-      [TInt(IULongLong, [])], false);
-    "__builtin_k1_stsud",
-      (TInt(IULongLong, []), 
-      [TInt(IULongLong, []); TInt(IULongLong, [])], false);
+  (* The builtin list is inspired from the GCC file builtin_k1.h *)
+  Builtins.functions = [ (* Some builtins are commented out because their opcode is not present (yet?) *)
+      (* BCU Instructions *)
+      "__builtin_k1_await", (TVoid [], [], false);
+      "__builtin_k1_barrier", (TVoid [], [], false);
+      "__builtin_k1_doze", (TVoid [], [], false);
+        (* No __builtin_k1_get - not compatible with the Asm model *)
+      "__builtin_k1_wfxl", (TVoid [], [TInt(IUChar, []); TInt(ILongLong, [])], false);
+      "__builtin_k1_wfxm", (TVoid [], [TInt(IUChar, []); TInt(ILongLong, [])], false);
+      "__builtin_k1_invaldtlb", (TVoid [], [], false);
+      "__builtin_k1_invalitlb", (TVoid [], [], false);
+      "__builtin_k1_probetlb", (TVoid [], [], false);
+      "__builtin_k1_readtlb", (TVoid [], [], false);
+      "__builtin_k1_sleep", (TVoid [], [], false);
+      "__builtin_k1_stop", (TVoid [], [], false);
+      "__builtin_k1_syncgroup", (TVoid [], [TInt(IUInt, [])], false);
+      "__builtin_k1_tlbwrite", (TVoid [], [], false);
+
+      (* LSU Instructions *)
+        (* No ACWS - __int128 *)
+      "__builtin_k1_afda", (TInt(IULongLong, []), [TPtr(TVoid [], []); TInt(ILongLong, [])], false);
+      "__builtin_k1_aldc", (TInt(IULongLong, []), [TPtr(TVoid [], [])], false);
+      "__builtin_k1_dinval", (TVoid [], [], false);
+      "__builtin_k1_dinvall", (TVoid [], [TPtr(TVoid [], [])], false);
+      "__builtin_k1_dtouchl", (TVoid [], [TPtr(TVoid [], [])], false);
+      "__builtin_k1_dzerol", (TVoid [], [TPtr(TVoid [], [])], false);
+      "__builtin_k1_fence", (TVoid [], [], false);
+      "__builtin_k1_iinval", (TVoid [], [], false);
+      "__builtin_k1_iinvals", (TVoid [], [TPtr(TVoid [], [])], false);
+      "__builtin_k1_itouchl", (TVoid [], [TPtr(TVoid [], [])], false);
+      "__builtin_k1_lbsu", (TInt(IChar, []), [TPtr(TVoid [], [])], false);
+      "__builtin_k1_lbzu", (TInt(IUChar, []), [TPtr(TVoid [], [])], false);
+      "__builtin_k1_ldu", (TInt(IULongLong, []), [TPtr(TVoid [], [])], false);
+      "__builtin_k1_lhsu", (TInt(IShort, []), [TPtr(TVoid [], [])], false);
+      "__builtin_k1_lhzu", (TInt(IUShort, []), [TPtr(TVoid [], [])], false);
+      "__builtin_k1_lwzu", (TInt(IUInt, []), [TPtr(TVoid [], [])], false);
+
+      (* ALU Instructions *)
+      (* "__builtin_k1_addhp", (TInt(IInt, []), [TInt(IInt, []); TInt(IInt, [])], false); *)
+      (* "__builtin_k1_adds", (TInt(IInt, []), [TInt(IInt, []); TInt(IInt, [])], false); *)
+      (* "__builtin_k1_bwlu", (TInt(IUInt, []), 
+        [TInt(IUInt, []); TInt(IUInt, []); TInt(IUInt, []); TInt(IUInt, []); TInt(IUShort, [])], false); *)
+      (* "__builtin_k1_bwluhp", (TInt(IUInt, []), [TInt(IUInt, []); TInt(IUInt, []); TInt(IUInt, [])], false); *)
+      (* "__builtin_k1_bwluwp", (TInt(IULongLong, []), 
+        [TInt(IULongLong, []); TInt(IULongLong, []); TInt(IUInt, [])], false); *)
+      (* "__builtin_k1_cbs", (TInt(IInt, []), [TInt(IUInt, [])], false); *)
+      (* "__builtin_k1_cbsdl", (TInt(ILongLong, []), [TInt(IULongLong, [])], false); *)
+      (* "__builtin_k1_clz", (TInt(IInt, []), [TInt(IUInt, [])], false); *)
+      "__builtin_k1_clzw", (TInt(IInt, []), [TInt(IUInt, [])], false);
+      "__builtin_k1_clzd", (TInt(ILongLong, []), [TInt(IULongLong, [])], false);
+      (* "__builtin_k1_clzdl", (TInt(ILongLong, []), [TInt(IULongLong, [])], false); *)
+      (* "__builtin_k1_cmove", (TInt(IInt, []), [TInt(IInt, []); TInt(IInt, []); TInt(IInt, [])], false); *)
+      (* "__builtin_k1_ctz", (TInt(IInt, []), [TInt(IUInt, [])], false); *)
+      "__builtin_k1_ctzw", (TInt(IInt, []), [TInt(IUInt, [])], false);
+      "__builtin_k1_ctzd", (TInt(ILongLong, []), [TInt(IULongLong, [])], false);
+      (* "__builtin_k1_ctzdl", (TInt(ILongLong, []), [TInt(IULongLong, [])], false); *)
+      (* "__builtin_k1_extfz", (TInt(IUInt, []), [TInt(IUInt, []); TInt(IUInt, []); TInt(IUInt, [])], false); *)
+      (* "__builtin_k1_landhp", (TInt(IInt, []), [TInt(IInt, []); TInt(IInt, []); TInt(IInt, [])], false); *)
+      (* "__builtin_k1_sat", (TInt(IInt, []), [TInt(IInt, []); TInt(IUChar, [])], false); *)
+      "__builtin_k1_satd", (TInt(ILongLong, []), [TInt(ILongLong, []); TInt(IUChar, [])], false);
+      (* "__builtin_k1_sbfhp", (TInt(IInt, []), [TInt(IInt, []); TInt(IInt, [])], false); *)
+      "__builtin_k1_sbmm8", (TInt(IULongLong, []), [TInt(IULongLong, []); TInt(IULongLong, [])], false);
+      "__builtin_k1_sbmmt8", (TInt(IULongLong, []), [TInt(IULongLong, []); TInt(IULongLong, [])], false);
+      (* "__builtin_k1_sllhps", (TInt(IUInt, []), [TInt(IUInt, []); TInt(IUInt, [])], false); *)
+      (* "__builtin_k1_srahps", (TInt(IUInt, []), [TInt(IUInt, []); TInt(IUInt, [])], false); *)
+      (* "__builtin_k1_stsu", (TInt(IUInt, []), [TInt(IUInt, []); TInt(IUInt, [])], false); *)
+      "__builtin_k1_stsud", (TInt(IULongLong, []), [TInt(IULongLong, []); TInt(IULongLong, [])], false);
+
+
     (* Synchronization *)
 (*  "__builtin_fence",
       (TVoid [], [], false);
diff --git a/mppa_k1c/TargetPrinter.ml b/mppa_k1c/TargetPrinter.ml
index 41ea06e4..f3babcd6 100644
--- a/mppa_k1c/TargetPrinter.ml
+++ b/mppa_k1c/TargetPrinter.ml
@@ -223,8 +223,121 @@ module Target : TARGET =
          end
 
       (* Pseudo-instructions not generated by Asmgen *)
-      | Pclzll(rd, rs) ->
+         (* BCU instructions *)
+      | Pawait ->
+         fprintf oc "	await	\n;;\n"
+      | Pbarrier ->
+         fprintf oc "	barrier	\n;;\n"
+      | Pdoze ->
+         fprintf oc "	doze	\n;;\n"
+      | Pwfxl(rs1, rs2) ->
+         fprintf oc "	wfxl	%a, %a\n;;\n" ireg rs1 ireg rs2
+      | Pwfxm(rs1, rs2) ->
+         fprintf oc "	wfxm	%a, %a\n;;\n" ireg rs1 ireg rs2
+      | Pinvaldtlb ->
+         fprintf oc "	invaldtlb	\n;;\n"
+      | Pinvalitlb ->
+         fprintf oc "	invalitlb	\n;;\n"
+      | Pprobetlb ->
+         fprintf oc "	probetlb	\n;;\n"
+      | Preadtlb ->
+         fprintf oc "	readtlb	\n;;\n"
+      | Psleep ->
+         fprintf oc "	sleep	\n;;\n"
+      | Pstop ->
+         fprintf oc "	stop	\n;;\n"
+      | Psyncgroup(rs) ->
+         fprintf oc "	syncgroup	%a\n;;\n" ireg rs
+      | Ptlbwrite ->
+         fprintf oc "	tlbwrite	\n;;\n"
+
+         (* LSU instructions *)
+      | Pafda(rd, rs1, rs2) ->
+         fprintf oc "	afda	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Paldc(rd, rs1) ->
+         fprintf oc "	aldc	%a = %a\n;;\n" ireg rd ireg rs1
+      | Pdinval ->
+         fprintf oc "	dinval	\n;;\n"
+      | Pdinvall (rs) ->
+         fprintf oc "	dinvall	%a\n;;\n" ireg rs
+      | Pdtouchl (rs) ->
+         fprintf oc "	dtouchl	%a\n;;\n" ireg rs
+      | Pdzerol (rs) ->
+         fprintf oc "	dzerol	%a\n;;\n" ireg rs
+      | Pfence ->
+         fprintf oc "	fence	\n;;\n"
+      | Piinval ->
+         fprintf oc "	iinval	\n;;\n"
+      | Piinvals (rs) ->
+         fprintf oc "	iinvals	%a\n;;\n" ireg rs
+      | Pitouchl (rs) ->
+         fprintf oc "	itouchl	%a\n;;\n" ireg rs
+      | Plbsu(rd, rs1) ->
+         fprintf oc "	lbsu	%a = %a\n;;\n" ireg rd ireg rs1
+      | Plbzu(rd, rs1) ->
+         fprintf oc "	lbzu	%a = %a\n;;\n" ireg rd ireg rs1
+      | Pldu(rd, rs1) ->
+         fprintf oc "	ldu	%a = %a\n;;\n" ireg rd ireg rs1
+      | Plhsu(rd, rs1) ->
+         fprintf oc "	lhsu	%a = %a\n;;\n" ireg rd ireg rs1
+      | Plhzu(rd, rs1) ->
+         fprintf oc "	lhzu	%a = %a\n;;\n" ireg rd ireg rs1
+      | Plwzu(rd, rs1) ->
+         fprintf oc "	lwzu	%a = %a\n;;\n" ireg rd ireg rs1
+
+         (* ALU instructions *)
+      | Paddhp(rd, rs1, rs2) ->
+         fprintf oc "	addhp	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Padds(rd, rs1, rs2) ->
+         fprintf oc "	adds	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Pbwlu(rd, rs1, rs2, rs3, rs4, rs5) ->
+         fprintf oc "	bwlu	%a = %a, %a, %a, %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 ireg rs3 ireg rs4 ireg rs5
+      | Pbwluhp(rd, rs1, rs2, rs3) ->
+         fprintf oc "	bwluhp	%a = %a, %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 ireg rs3
+      | Pbwluwp(rd, rs1, rs2, rs3) ->
+         fprintf oc "	bwluwp	%a = %a, %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 ireg rs3
+      | Pcbs(rd, rs) ->
+         fprintf oc "	cbs	%a = %a\n;;\n" ireg rd ireg rs
+      | Pcbsdl(rd, rs) ->
+         fprintf oc "	cbsdl	%a = %a\n;;\n" ireg rd ireg rs
+      | Pclz(rd, rs) ->
+         fprintf oc "	clz	%a = %a\n;;\n" ireg rd ireg rs
+      | Pclzw(rd, rs) ->
+         fprintf oc "	clzw	%a = %a\n;;\n" ireg rd ireg rs
+      | Pclzd(rd, rs) ->
          fprintf oc "	clzd	%a = %a\n;;\n" ireg rd ireg rs
+      | Pclzdl(rd, rs) ->
+         fprintf oc "	clzdl	%a = %a\n;;\n" ireg rd ireg rs
+      | Pcmove(rd, rs1, rs2, rs3) ->
+         fprintf oc "	cmove	%a = %a, %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 ireg rs3
+      | Pctz(rd, rs) ->
+         fprintf oc "	ctz	%a = %a\n;;\n" ireg rd ireg rs
+      | Pctzw(rd, rs) ->
+         fprintf oc "	ctzw	%a = %a\n;;\n" ireg rd ireg rs
+      | Pctzd(rd, rs) ->
+         fprintf oc "	ctzd	%a = %a\n;;\n" ireg rd ireg rs
+      | Pctzdl(rd, rs) ->
+         fprintf oc "	ctzdl	%a = %a\n;;\n" ireg rd ireg rs
+      | Pextfz(rd, rs1, rs2, rs3) ->
+         fprintf oc "	extfz	%a = %a, %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 ireg rs3
+      | Plandhp(rd, rs1, rs2, rs3) ->
+         fprintf oc "	landhp	%a = %a, %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2 ireg rs3
+      | Psat(rd, rs1, rs2) ->
+         fprintf oc "	sat	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Psatd(rd, rs1, rs2) ->
+         fprintf oc "	satd	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Psbfhp(rd, rs1, rs2) ->
+         fprintf oc "	sbfhp	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Psbmm8(rd, rs1, rs2) ->
+         fprintf oc "	sbmm8	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Psbmmt8(rd, rs1, rs2) ->
+         fprintf oc "	sbmmt8	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Psllhps(rd, rs1, rs2) ->
+         fprintf oc "	sllhps	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Psrahps(rd, rs1, rs2) ->
+         fprintf oc "	srahps	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
+      | Pstsu(rd, rs1, rs2) ->
+         fprintf oc "	stsu	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
       | Pstsud(rd, rs1, rs2) ->
          fprintf oc "	stsud	%a = %a, %a\n;;\n" ireg rd ireg rs1 ireg rs2
 
diff --git a/test/mppa/general/clzd.c b/test/mppa/general/clzd.c
new file mode 100644
index 00000000..4bedab97
--- /dev/null
+++ b/test/mppa/general/clzd.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 1)
+{
+    c = __builtin_k1_clzd(t[0]);
+}
+END_TEST()
diff --git a/test/mppa/general/clzll.c b/test/mppa/general/clzll.c
deleted file mode 100644
index 13905cba..00000000
--- a/test/mppa/general/clzll.c
+++ /dev/null
@@ -1,7 +0,0 @@
-#include "framework.h"
-
-BEGIN_TEST(long long)
-{
-    c = __builtin_clzll(a);
-}
-END_TEST()
diff --git a/test/mppa/general/clzw.c b/test/mppa/general/clzw.c
new file mode 100644
index 00000000..361492f2
--- /dev/null
+++ b/test/mppa/general/clzw.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 1)
+{
+    c = __builtin_k1_clzw(t[0]);
+}
+END_TEST()
diff --git a/test/mppa/general/ctzd.c b/test/mppa/general/ctzd.c
new file mode 100644
index 00000000..6f6586ad
--- /dev/null
+++ b/test/mppa/general/ctzd.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 1)
+{
+    c = __builtin_k1_ctzd(t[0]);
+}
+END_TEST()
diff --git a/test/mppa/general/ctzw.c b/test/mppa/general/ctzw.c
new file mode 100644
index 00000000..b0f2c937
--- /dev/null
+++ b/test/mppa/general/ctzw.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 1)
+{
+    c = __builtin_k1_ctzw(t[0]);
+}
+END_TEST()
diff --git a/test/mppa/general/framework.h b/test/mppa/general/framework.h
index 78f2617e..b7dc4933 100644
--- a/test/mppa/general/framework.h
+++ b/test/mppa/general/framework.h
@@ -3,6 +3,17 @@
 
 #include "../lib/prng.c"
 
+#define BEGIN_TEST_N(type, N)\
+    int main(void){\
+        type t[N], c, i, j, S;\
+        srand(0);\
+        S = 0;\
+        for (i = 0 ; i < 100 ; i++){\
+            c = randlong();\
+            for (j = 0 ; j < N ; j++)\
+                t[j] = randlong();\
+    /* END BEGIN_TEST_N */
+
 #define BEGIN_TEST(type)\
     int main(void){\
         type a, b, c, i, S;\
diff --git a/test/mppa/general/satd.c b/test/mppa/general/satd.c
new file mode 100644
index 00000000..d8d0d256
--- /dev/null
+++ b/test/mppa/general/satd.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 2)
+{
+    c = __builtin_k1_satd(t[0], t[1]);
+}
+END_TEST()
diff --git a/test/mppa/general/sbmm8.c b/test/mppa/general/sbmm8.c
new file mode 100644
index 00000000..beced8fc
--- /dev/null
+++ b/test/mppa/general/sbmm8.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 2)
+{
+    c = __builtin_k1_sbmm8(t[0], t[1]);
+}
+END_TEST()
diff --git a/test/mppa/general/sbmmt8.c b/test/mppa/general/sbmmt8.c
new file mode 100644
index 00000000..8a64e7e7
--- /dev/null
+++ b/test/mppa/general/sbmmt8.c
@@ -0,0 +1,7 @@
+#include "framework.h"
+
+BEGIN_TEST_N(unsigned long long, 2)
+{
+    c = __builtin_k1_sbmmt8(t[0], t[1]);
+}
+END_TEST()
diff --git a/test/mppa/general/stsud.c b/test/mppa/general/stsud.c
index 81fb6e6d..fb07b94f 100644
--- a/test/mppa/general/stsud.c
+++ b/test/mppa/general/stsud.c
@@ -1,7 +1,7 @@
 #include "framework.h"
 
-BEGIN_TEST(unsigned long long)
+BEGIN_TEST_N(unsigned long long, 2)
 {
-    c = __builtin_k1_stsud(a, b);
+    c = __builtin_k1_stsud(t[0], t[1]);
 }
 END_TEST()
diff --git a/test/mppa/generate.sh b/test/mppa/generate.sh
index 765128d4..ea633724 100644
--- a/test/mppa/generate.sh
+++ b/test/mppa/generate.sh
@@ -4,14 +4,18 @@
 cfile="$1"
 writefile="$2"
 
+dirwritefile=$(dirname $writefile)
+asmdir=$dirwritefile/../asm/gcc
+
 if [ ! -f $cfile ]; then
 	>&2 echo "ERROR: $cfile not found"
 	shift; continue
 fi
 
-mkdir -p $(dirname $writefile)
+mkdir -p $dirwritefile
+mkdir -p $asmdir
 
-#sed -n "s/^.*\/\*\s*RETURN VALUE:\s*\([0-9]*\)\s*\*\//\1/p" $1 > $2
 tmpbin=/tmp/k1-$(basename $1)-bin 
+k1-gcc -O0 $1 -S -o $asmdir/$(basename $1).s
 k1-gcc -O0 $1 -o $tmpbin
 (k1-cluster -- $tmpbin; echo $? > $2)