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-rw-r--r--aarch64/PostpassSchedulingOracle.ml1
-rw-r--r--aarch64/PrepassSchedulingOracle.ml4
-rw-r--r--scheduling/InstructionScheduler.ml2
-rw-r--r--scheduling/InstructionScheduler.mli3
-rw-r--r--scheduling/RTLpathScheduleraux.ml9
5 files changed, 17 insertions, 2 deletions
diff --git a/aarch64/PostpassSchedulingOracle.ml b/aarch64/PostpassSchedulingOracle.ml
index cde3e7a7..a9737088 100644
--- a/aarch64/PostpassSchedulingOracle.ml
+++ b/aarch64/PostpassSchedulingOracle.ml
@@ -507,6 +507,7 @@ let build_problem bb =
{
max_latency = -1;
resource_bounds = opweights.pipelined_resource_bounds;
+ live_regs_entry = Registers.Regset.empty; (* PLACEHOLDER *)
instruction_usages = instruction_usages bb;
latency_constraints = latency_constraints bb;
}
diff --git a/aarch64/PrepassSchedulingOracle.ml b/aarch64/PrepassSchedulingOracle.ml
index 2c3eb14f..1fd12a6a 100644
--- a/aarch64/PrepassSchedulingOracle.ml
+++ b/aarch64/PrepassSchedulingOracle.ml
@@ -410,6 +410,7 @@ let define_problem (opweights : opweights) seqa =
let simple_deps = get_simple_dependencies opweights seqa in
{ max_latency = -1;
resource_bounds = opweights.pipelined_resource_bounds;
+ live_regs_entry = Regset.empty; (* PLACEHOLDER *)
instruction_usages = Array.map (resources_of_instruction opweights) (Array.map fst seqa);
latency_constraints =
(* if (use_alias_analysis ())
@@ -439,7 +440,8 @@ let prepass_scheduler_by_name name problem early_ones =
| "zigzag" -> zigzag_scheduler problem early_ones
| _ -> scheduler_by_name name problem
-let schedule_sequence (seqa : (instruction*Regset.t) array) =
+let schedule_sequence (seqa : (instruction*Regset.t) array)
+ (live_regs_entry : Registers.Regset.t)=
let opweights = OpWeights.get_opweights () in
try
if (Array.length seqa) <= 1
diff --git a/scheduling/InstructionScheduler.ml b/scheduling/InstructionScheduler.ml
index eab0b21a..976037bd 100644
--- a/scheduling/InstructionScheduler.ml
+++ b/scheduling/InstructionScheduler.ml
@@ -33,6 +33,7 @@ type latency_constraint = {
type problem = {
max_latency : int;
resource_bounds : int array;
+ live_regs_entry : Registers.Regset.t;
instruction_usages : int array array;
latency_constraints : latency_constraint list;
};;
@@ -438,6 +439,7 @@ let reverse_problem problem =
{
max_latency = problem.max_latency;
resource_bounds = problem.resource_bounds;
+ live_regs_entry = Registers.Regset.empty; (* PLACEHOLDER *)
instruction_usages = Array.init (nr_instructions + 1)
(fun i ->
if i=0
diff --git a/scheduling/InstructionScheduler.mli b/scheduling/InstructionScheduler.mli
index fb7af3f6..f53dc0ef 100644
--- a/scheduling/InstructionScheduler.mli
+++ b/scheduling/InstructionScheduler.mli
@@ -23,6 +23,9 @@ type problem = {
resource_bounds : int array;
(** An array of number of units available indexed by the kind of resources to be allocated. It can be empty, in which case the problem is scheduling without resource constraints. *)
+ live_regs_entry : Registers.Regset.t;
+ (** The set of live pseudo-registers at entry. *)
+
instruction_usages: int array array;
(** At index {i i} the vector of resources used by instruction number {i i}. It must be the same length as [resource_bounds] *)
diff --git a/scheduling/RTLpathScheduleraux.ml b/scheduling/RTLpathScheduleraux.ml
index aeed39df..55f1a078 100644
--- a/scheduling/RTLpathScheduleraux.ml
+++ b/scheduling/RTLpathScheduleraux.ml
@@ -72,6 +72,11 @@ let get_superblocks code entry pm typing =
lsb
end
+(* PLACEHOLDER *)
+let get_live_regs_entry (sb : superblock) =
+ Registers.Regset.empty
+
+
(* TODO David *)
let schedule_superblock sb code =
if not !Clflags.option_fprepass
@@ -90,6 +95,7 @@ let schedule_superblock sb code =
match predicted_successor ii with
| Some _ -> 0
| None -> 1 in
+ let live_regs_entry = get_live_regs_entry sb in
match PrepassSchedulingOracle.schedule_sequence
(Array.map (fun i ->
(match PTree.get i code with
@@ -98,7 +104,8 @@ let schedule_superblock sb code =
(match PTree.get i sb.liveins with
| Some s -> s
| None -> Regset.empty))
- (Array.sub sb.instructions 0 (nr_instr-trailer_length))) with
+ (Array.sub sb.instructions 0 (nr_instr-trailer_length)))
+ live_regs_entry with
| None -> sb.instructions
| Some order ->
let ins' =