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-rw-r--r--arm/Machregsaux.ml5
-rw-r--r--arm/Machregsaux.mli2
2 files changed, 7 insertions, 0 deletions
diff --git a/arm/Machregsaux.ml b/arm/Machregsaux.ml
index ce5c67f6..14c75155 100644
--- a/arm/Machregsaux.ml
+++ b/arm/Machregsaux.ml
@@ -33,3 +33,8 @@ let register_by_name s =
let can_reserve_register r =
List.mem r Conventions1.int_callee_save_regs
|| List.mem r Conventions1.float_callee_save_regs
+
+let class_of_type = function
+ | AST.Tint | AST.Tlong -> 0
+ | AST.Tfloat | AST.Tsingle -> 1
+ | AST.Tany32 | AST.Tany64 -> assert false
diff --git a/arm/Machregsaux.mli b/arm/Machregsaux.mli
index 9404568d..d7117c21 100644
--- a/arm/Machregsaux.mli
+++ b/arm/Machregsaux.mli
@@ -16,3 +16,5 @@ val name_of_register: Machregs.mreg -> string option
val register_by_name: string -> Machregs.mreg option
val is_scratch_register: string -> bool
val can_reserve_register: Machregs.mreg -> bool
+
+val class_of_type: AST.typ -> int