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-rw-r--r--scheduling/InstructionScheduler.ml7
1 files changed, 4 insertions, 3 deletions
diff --git a/scheduling/InstructionScheduler.ml b/scheduling/InstructionScheduler.ml
index a069de59..08349f60 100644
--- a/scheduling/InstructionScheduler.ml
+++ b/scheduling/InstructionScheduler.ml
@@ -35,7 +35,8 @@ type problem = {
resource_bounds : int array;
live_regs_entry : Registers.Regset.t;
typing : RTLtyping.regenv;
- pressure_deltas : int array array;
+ reference_counting : ((Registers.reg, int * int) Hashtbl.t
+ * (Registers.reg list array)) option;
instruction_usages : int array array;
latency_constraints : latency_constraint list;
};;
@@ -370,7 +371,7 @@ let reg_pres_scheduler (problem : problem) : solution option =
(Registers.Regset.elements live_regs_entry);
- let pressures = problem.pressure_deltas in
+ let pressures = [| [| |] |] in
let priorities = critical_paths successors in
@@ -629,7 +630,7 @@ let reverse_problem problem =
with creating a reverse scheduler aware of reg press *)
typing = problem.typing;
- pressure_deltas = [| [| |] |] ;
+ reference_counting = problem.reference_counting;
instruction_usages = Array.init (nr_instructions + 1)
(fun i ->
if i=0