1 files changed, 9 insertions, 9 deletions
diff --git a/scheduling/RTLpathLivegenaux.ml b/scheduling/RTLpathLivegenaux.ml
index db3fc9d4..9b93bc32 100644
--- a/scheduling/RTLpathLivegenaux.ml
+++ b/scheduling/RTLpathLivegenaux.ml
@@ -229,12 +229,14 @@ let get_outputs liveness f n pi =
       fun n -> get_some @@ PTree.get n liveness
     ) path_last_successors in
   let outputs = List.fold_left Regset.union Regset.empty list_input_regs in
-
-  match last_instruction with
-  | Icall (_, _, _, _, _) | Itailcall (_, _, _)
-  | Ibuiltin (_, _, _, _) | Ijumptable (_, _)
-  | Ireturn _ -> ((transfer f pc_last outputs), outputs)
-  | _ -> (outputs, outputs)
+  let por = match last_instruction with (* see RTLpathLivegen.final_inst_checker *)
+    | Icall (_, _, _, res, _) -> Regset.remove res outputs
+    | Ibuiltin (_, _, res, _) ->  Liveness.reg_list_dead (AST.params_of_builtin_res res) outputs
+    | Itailcall (_, _, _) | Ireturn _ ->
+       assert (outputs = Regset.empty); (* defensive check for performance *)
+       outputs
+    | _ -> outputs
+  in (por, outputs)
 
 let set_pathmap_liveness f pm =
   let liveness = analyze f in
@@ -245,13 +247,12 @@ let set_pathmap_liveness f pm =
       let inputs = get_some @@ PTree.get n liveness in
       let (por, outputs) = get_outputs liveness f n pi in
       new_pm := PTree.set n
-                  {psize=pi.psize; input_regs=inputs; pre_output_regs=por; output_regs=outputs} !new_pm (* FIXME: STUB *)
+                  {psize=pi.psize; input_regs=inputs; pre_output_regs=por; output_regs=outputs} !new_pm
     ) (PTree.elements pm);
     !new_pm
   end
 
 let print_path_info pi = begin
-  (*debug_flag := true;*)
   debug "(psize=%d; " (Camlcoq.Nat.to_int pi.psize);
   debug "\ninput_regs=";
   print_regset pi.input_regs;
@@ -260,7 +261,6 @@ let print_path_info pi = begin
   debug "\n; output_regs=";
   print_regset pi.output_regs;
   debug ")\n"
-  (*debug_flag := false*)
 end
 
 let print_path_map path_map = begin