aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* xorimmsubmission_OOPSLA2021_RISCVLéo Gourdin2021-04-092-0/+77
* removing useless flag checkLéo Gourdin2021-04-091-3/+1
* Removing addptrofs draft, next will be mergingLéo Gourdin2021-04-099-254/+104
* bugfixLéo Gourdin2021-04-082-2/+3
* Important commit on expansions' mini CSE, and a draft for addptrofsLéo Gourdin2021-04-0613-762/+1081
* a more general way to manage special registers before introducing SPLéo Gourdin2021-03-308-560/+593
* Now a more general way to perform imm operationsLéo Gourdin2021-03-309-38/+68
* Refactoring the mayundef OP to be more general...Léo Gourdin2021-03-305-201/+191
* bugfix and printOpLéo Gourdin2021-03-262-19/+29
* fix admitLéo Gourdin2021-03-261-2/+1
* Compiler options to manage expansionsLéo Gourdin2021-03-263-179/+176
* Adding more expansions, improving miniCSE, and tuning prepassLéo Gourdin2021-03-269-388/+1518
* Bugfix livenessLéo Gourdin2021-03-231-12/+8
* Remove first nop when doing expansionLéo Gourdin2021-03-212-188/+213
* fp testLéo Gourdin2021-03-101-0/+7
* Adding miniCSE here tooLéo Gourdin2021-03-081-10/+10
* Merge remote-tracking branch 'origin/riscv-work' into riscv-work-fpinit-stillexpLéo Gourdin2021-03-0610-187/+250
|\
| * some simplification in miniCSELéo Gourdin2021-03-061-17/+14
| * Adding a mini CSE pass in the expansion oracleLéo Gourdin2021-03-0610-197/+268
* | Adding a flag to test fp_init_expLéo Gourdin2021-03-023-150/+159
* | Adding fp init expansionsLéo Gourdin2021-03-022-3/+18
* | Merge remote-tracking branch 'origin/riscv-still-asmcondexp' into riscv-work-...Léo Gourdin2021-03-023-96/+1088
|\ \
| * | Asmcondexp branche useful to benchmark expansionsLéo Gourdin2021-03-023-96/+1088
* | | [Admitted checker] Oracle expansion for float/float32 constant initLéo Gourdin2021-03-024-10/+31
| |/ |/|
* | fix ci ?Léo Gourdin2021-03-0211-1/+68
|/
* Merge conflicts solved and cleaning in Asmgenproof after expansionLéo Gourdin2021-03-024-1148/+106
* Merge remote-tracking branch 'origin/riscV-cmov' into riscv-workLéo Gourdin2021-03-0219-20/+705
|\
| * Adding missing operators in PrintOp for debuggingLéo Gourdin2021-02-251-0/+5
| * écrase X31riscV-cmovDavid Monniaux2021-02-031-1/+2
| * Merge remote-tracking branch 'origin/kvx-work' into riscV-cmovDavid Monniaux2021-02-031-1/+1
| |\
| * | no branchless by defaultDavid Monniaux2021-02-021-1/+1
| * | detect redundant cmovDavid Monniaux2021-02-022-3/+34
| * | fix code generation for select(b, r, r)David Monniaux2021-02-021-2/+7
| * | fix problem if rt = rfDavid Monniaux2021-02-021-6/+8
| * | example of cmovDavid Monniaux2021-02-021-0/+28
| * | Cmov TsingleDavid Monniaux2021-02-023-33/+43
| * | implement for another register configurationDavid Monniaux2021-02-021-1/+8
| * | make branchless the defaultDavid Monniaux2021-02-021-1/+1
| * | some more cases implementedDavid Monniaux2021-02-021-12/+25
| * | PselectdDavid Monniaux2021-02-023-0/+33
| * | cmov on integersDavid Monniaux2021-02-023-11/+110
| * | begin synthesizing selectDavid Monniaux2021-02-023-2/+34
| * | asmgen OselectlDavid Monniaux2021-02-022-0/+11
| * | begin implementing selectDavid Monniaux2021-02-028-6/+114
| * | select01_longDavid Monniaux2021-02-011-130/+10
| * | repr etc.David Monniaux2021-02-011-4/+2
| * | bitwise_select_value_correctDavid Monniaux2021-02-011-0/+12
| * | int64_of_value some moreDavid Monniaux2021-02-011-14/+15
| * | int64_of_valueDavid Monniaux2021-02-011-0/+77
| * | Asmgen for bits / floatDavid Monniaux2021-02-011-0/+13