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* Merge branch 'master' of https://github.com/AbsInt/CompCert into towards_3.10David Monniaux2021-09-241-3/+3
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| * Fix wrong expansion of __builtin_memcpy_alignedXavier Leroy2021-09-231-2/+2
| | | | | | | | | | | | | | | | | | In the "small" case, there was an error in the choice of temporary registers to use when one argument is a stack location and the other is a register. The chosen temporary could conflict with the argument that resides in a register. Fixes: #412
| * For __builtin_memcpy_aligned, watch out for alignment of stack offsetsXavier Leroy2021-09-231-0/+1
| | | | | | | | | | | | | | | | | | | | Stack offsets must be multiple of 8 when using ldp/stp instructions and multiple of the transferred size when using other load/store instructions with offsets greater than 256. For simplicity, always require that the offset is multiple of 8. Fixes: #410
| * Support __builtin_unreachableXavier Leroy2021-05-021-0/+4
| | | | | | | | Not yet used for optimizations.
* | fix issue 244Léo Gourdin2021-09-191-0/+1
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* | [BROKEN] Merge with v3.9 : something broken for __builtin_expect in ↵Cyril SIX2021-06-011-0/+4
| | | | | | | | cfrontend/C2C.ml
* | Merge branch 'master' into merge_master_8.13.1Sylvain Boulmé2021-03-231-10/+38
|\| | | | | | | | | | | | | | | | | PARTIAL MERGE (PARTLY BROKEN). See unsolved conflicts in: aarch64/TO_MERGE and riscV/TO_MERGE WARNING: interface of va_args and assembly sections have changed
| * AArch64: macOS portXavier Leroy2020-12-261-10/+38
| | | | | | | | | | This commit adds support for macOS (and probably iOS) running on AArch64 / ARM 64-bit / "Apple silicon" processors.
* | fix builtin_sqrtSylvain Boulmé2020-12-171-1/+1
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* | Merge branch 'kvx-work' into aarch64-peepholeSylvain Boulmé2020-12-171-1/+11
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| * | Merge branch 'master' (Absint 3.8) into kvx-work-merge3.8David Monniaux2020-11-181-4/+12
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| | * Added implementation for fmin/fmax for aarch64.Bernhard Schommer2020-11-061-0/+4
| | | | | | | | | | | | | | | The two built-in function map to the fmax and fmin instruction. Bug 30035
| | * Add __builtin_sqrt as synonymous for __builtin_fsqrtXavier Leroy2020-07-271-1/+1
| | | | | | | | | | | | __builtin_sqrt (no "f") is the name used by GCC and Clang.
| | * AArch64 implementation of __builtin_ctz*Xavier Leroy2020-07-271-1/+7
| | | | | | | | | | | | Using the "rbit" instruction (reverse bits).
| | * No need to process __builtin_fabs in $ARCH/Asmexpand.mlXavier Leroy2020-07-271-2/+0
| | | | | | | | | | | | __builtin_fabs has already been expanded in backend/Selection.v .
* | | Big improvment in peephole, changing LDP/STP semanticsLéo Gourdin2020-12-101-5/+5
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* | | a first working draft on ldp/stp peepholeLéo Gourdin2020-12-041-4/+4
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* | | Adding semantics for PldpLéo Gourdin2020-12-021-2/+2
| | | | | | | | | This commit prepare the backend for a peephole optimization in Asmblock.
* | | Removing OrigAsmgen by moving the necessary functions in Asmgen.v Léo Gourdin2020-11-251-3/+3
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* | | Preparation for postpass in aarch64 and refactoringLéo Gourdin2020-11-021-40/+40
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* | | aarch64 compiles again (but ccomp generates incorrect assembly)Sylvain Boulmé2020-10-231-51/+51
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* / various fixes for aarch64 profilingDavid Monniaux2020-04-101-1/+1
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* Revert "Remove `__builtin_nop` for some architectures. (#208)"Bernhard Schommer2020-01-031-0/+2
| | | | This reverts commit 4dfcd7d4be18e8bc437ca170782212aa06635a95.
* Remove `__builtin_nop` for some architectures. (#208)Bernhard Schommer2019-12-211-2/+0
| | | | | | | The `__builtin_nop` function is documented only for PowerPC. It was added to the other architectures by copy paste, but has no known uses. So, remove `__builtin_nop` from all architectures but PowerPC.
* The SP register has dwarf register number 31.Bernhard Schommer2019-12-111-1/+1
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* Added dwarf register numbers for aarch64Bernhard Schommer2019-11-281-3/+18
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* Offset out of range for ldp/stp instructionsxavier.leroy2019-08-231-1/+3
| | | | These instructions are generated by __builtin_memcpy.
* AArch64 portXavier Leroy2019-08-081-0/+436
This commit adds a back-end for the AArch64 architecture, namely ARMv8 in 64-bit mode.