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* Replacing default notrap load value by Vundef everywherecsix-PhDCyril SIX2021-06-181-2/+0
* [BROKEN] Merge branch 'mppa-work' into mppa-RTLpathSECyril SIX2020-04-101-2/+17
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| * finish mergeDavid Monniaux2019-12-021-1/+1
| * Merge remote-tracking branch 'origin/mppa-work' into mppa-non-trapping-loadDavid Monniaux2019-12-021-1/+4
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| * Merge tag 'v3.6_mppa_2019-09-20' of gricad-gitlab.univ-grenoble-alpes.fr:sixc...David Monniaux2019-09-201-3/+3
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| * | more proofs going throughDavid Monniaux2019-09-051-1/+15
* | | [regression to check!] Merge tag 'v3.6' into mppa-workCyril SIX2019-10-161-0/+1
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| * AArch64 portXavier Leroy2019-08-081-1/+1
* | Merge branch 'if-conversion' of https://github.com/AbsInt/CompCert into mppa-...David Monniaux2019-06-031-1/+1
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| * lib/Coqlib.v: remove defns about multiplication, division, modulusXavier Leroy2019-04-231-1/+1
* | Compiles for x86 and mppa_k1c (except Asmexpandaux.ml)Sylvain Boulmé2018-11-271-3/+3
* | BROKEN - works for x86, not for k1 anymoreCyril SIX2018-11-261-1/+1
* | Merge tag 'v3.4' into mppa_k1cCyril SIX2018-11-211-4/+66
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| * Treat Outgoing stack slots as caller-save in LTL/Linear semantics (#237)Xavier Leroy2018-06-171-5/+58
| * Model external calls as destroying all caller-save registersXavier Leroy2018-06-011-1/+10
* | MPPA - Machregs + Conventions1 + backend proof tweakingCyril SIX2018-04-041-1/+1
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* Hybrid 64bit/32bit PowerPC portBernhard Schommer2017-05-031-1/+1
* Support for 64-bit architectures: generic supportXavier Leroy2016-10-011-1/+2
* Introduce register pairs to describe calling conventions more preciselyXavier Leroy2016-05-171-9/+13
* Revise the Stacking pass and its proof to make it easier to adapt to 64-bit a...Xavier Leroy2016-04-271-4/+3
* Updated PR by removing whitespaces. Bug 17450.Bernhard Schommer2015-10-201-35/+35
* Renaming {BA,BR}_longofwords -> {BA,BR}_splitlong.Xavier Leroy2015-08-221-1/+1
* Refactoring of builtins and annotations in the back-end.Xavier Leroy2015-08-211-12/+28
* Extend annotations so that they can keep track of global variables and local ...Xavier Leroy2015-03-271-2/+2
* Merge of "newspilling" branch:xleroy2014-07-231-644/+142
* Merge of branch linear-typing:xleroy2014-04-061-76/+779
* Revert commits r2435 and r2436 (coarser RTLtyping / finer Lineartyping):xleroy2014-03-281-642/+66
* Commentsxleroy2014-03-271-0/+7
* Revised division of labor between RTLtyping and Lineartyping:xleroy2014-03-271-66/+635
* Merge of the float32 branch: xleroy2013-05-191-23/+31
* Big merge of the newregalloc-int64 branch. Lots of changes in two directions:xleroy2013-04-201-132/+92
* Remove some useless "Require".xleroy2012-12-301-1/+0
* Globalenvs: allocate one-byte block with permissions Nonempty for eachxleroy2012-11-121-1/+1
* IA32 port: more faithful treatment of pseudoregister ST0.xleroy2011-08-081-4/+15
* Revised handling of annotation statements, and more generally built-in functi...xleroy2011-06-131-0/+6
* Merge of branch "unsigned-offsets":xleroy2011-04-091-3/+66
* Support for inlined built-ins.xleroy2010-06-291-0/+6
* Merge of the newmem and newextcalls branches:xleroy2010-03-071-0/+1
* More realistic treatment of jump tables: show the absence of overflow when ac...xleroy2009-11-101-0/+2
* Added support for jump tables in back end.xleroy2009-11-101-0/+4
* - Added alignment constraints to memory loads and stores.xleroy2009-01-111-2/+0
* Revised back-end so that only 2 integer registers are reserved for reloading.xleroy2008-12-211-1/+1
* Revu le traitement de la 'red zone' en bas de la pilexleroy2008-04-121-1/+1
* Revu gestion retaddr et link dans Stackingxleroy2008-04-121-1/+1
* Ajout license, README, copyright noticesxleroy2008-01-271-0/+12
* Fusion des modifications faites sur les branches "tailcalls" et "smallstep".xleroy2007-08-041-182/+26
* Lever la restriction sur les fonctions externes, restriction qui exigeait que...xleroy2006-10-221-1/+0
* typo in commentxleroy2006-09-171-1/+1
* Fusion de la branche "traces":xleroy2006-09-041-1/+12
* Initial import of compcertxleroy2006-02-091-0/+254