aboutsummaryrefslogtreecommitdiffstats
path: root/mppa_k1c/Asmexpand.ml
Commit message (Expand)AuthorAgeFilesLines
* Fix for frame pointer being destroyedCyril SIX2019-03-121-5/+10
* volatile storesDavid Monniaux2019-03-101-43/+40
* volatile loadDavid Monniaux2019-03-101-37/+37
* Remove unnecessary and error prone FR constructor for pregsCyril SIX2019-02-201-1/+0
* implemented builtin memcpyDavid Monniaux2019-02-011-95/+50
* give meaningful messages pleaseDavid Monniaux2019-01-271-2/+12
* Added sxwd and zxwd supportCyril SIX2019-01-221-4/+0
* Ommited a ;; in va_arg_start macroCyril SIX2019-01-171-0/+1
* Corrected a bug in Pallocframe expansion with va_argsCyril SIX2019-01-171-3/+6
* Added a simple postpass oracle that splits a bblock into single instruction b...Cyril SIX2018-12-171-0/+2
* Finished implementation of va_arg + testing doneCyril SIX2018-11-301-4/+8
* Wrote some tests on va_arg, need to implement __compcert_va_int32 & cieCyril SIX2018-11-281-5/+4
* mppa_k1c compilesCyril SIX2018-11-281-3/+2
* Changed ABI to match GCC - interoperability not tested yetCyril SIX2018-11-231-4/+4
* Mise à jour vis à vis de CompCert 3.4Cyril SIX2018-11-211-5/+2
* Fixed BaR mentions in the ML filesCyril SIX2018-09-281-7/+4
* Rebase avec le commit qui fixe les tests + librairiesCyril SIX2018-09-061-6/+6
* Asmblock & cie - ça compileCyril SIX2018-09-061-18/+22
* Extraction issueCyril SIX2018-09-061-2/+2
* MPPA - Added Builtins support. Starting with clzll and stsudCyril SIX2018-06-051-60/+5
* WIP - Trying to add builtins support. They are not detected for now :(Cyril SIX2018-05-301-4/+4
* MPPA - refactored instructionsCyril SIX2018-05-111-6/+6
* MPPA - FIX GPR10 is now the Frame Pointer in Asmexpand.ml (instead of GPR32)Cyril SIX2018-04-261-3/+3
* MPPA - Ocast32signedCyril SIX2018-04-111-2/+3
* MPPA - bunch of ops added : lowlong, and, or, shr..Cyril SIX2018-04-101-2/+2
* MPPA - code cleaningCyril SIX2018-04-041-1/+1
* MPPA - The project compiles.Cyril SIX2018-04-041-73/+85
* Hook for MPPA_K1c (generates Risc-V code for now)Cyril SIX2018-04-041-0/+619