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* Typo in expand_builtin_memcpy_smallXavier Leroy2021-10-011-1/+1
| | | | Follow-up to c34d25e01
* Fix wrong expansion of __builtin_memcpy_alignedXavier Leroy2021-09-231-2/+2
| | | | | | | | | In the "small" case, there was an error in the choice of temporary registers to use when one argument is a stack location and the other is a register. The chosen temporary could conflict with the argument that resides in a register. Fixes: #412
* Share code for memory access for PowerPCBernhard Schommer2021-09-061-114/+72
| | | | | | Instead of duplicating the memory access code in `Asmexpand.ml` we move the code for each of the different addressings in `Asmgen.v` into separate functions that then can be reused in `Asmexpand.ml`.
* Support __builtin_unreachableXavier Leroy2021-05-021-0/+3
| | | | Not yet used for optimizations.
* More fixes for ld/std issue.Bernhard Schommer2021-04-241-11/+40
| | | | | | | Volatile load and store are expanded later and also use the ld/std instructions, therefore the same fixes that are applied as well for them. Bug 30983
* PowerPC: wrong computation of the position of the first vararg argumentXavier Leroy2021-01-151-2/+3
| | | | | | | | | In function Asmexpand.next_arg_locations: If 7 integer parameter passing registers have been used already, and the next fixed arguments are Tlong then Tint, the Tlong argument was correctly analyzed as being passed on the stack, but the Tint argument was incorrectly analyzed as being passed in the 8th register.
* Changed cc_varargs to an option typeBernhard Schommer2020-12-251-1/+1
| | | | | | Instead of being a simple boolean we now use an option type to record the number of fixed (non-vararg) arguments. Hence, `None` means not vararg, and `Some n` means `n` fixed arguments followed with varargs.
* Remove Pfcfi, Pfcfiu, Pfctiu pseudoinstructionsXavier Leroy2020-12-061-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also remove the Ofloatofint, Ofloatofintu, and Ointuoffloat PowerPC operations. The pseudoinstructions were used to implement these operations, as follows: Pfcfi : Ofloatofint i.e. the conversion signed int32 -> float64 Pfcfiu : Ofloatofintu i.e. the conversion unsigned int32 -> float64 Pfctiu : Ointuoffloat i.e. the conversion float64 -> unsigned int32 These pseudoinstructions were expanded (in Asmexpand.ml) in terms of Pfcfid : signed int64 -> float64 Pfctidz : float64 -> signed int64 and int32/int64 conversions. This commit performs this expansion during instruction selection (SelectOp.vp): floatofint(n) becomes floatoflong(longofint(n)) floatofintu(n) becomes floatoflong(longuofint(n)) intuoffloat(n) becomes cast32unsigned(longoffloat(n)) Then there is no need for the 3 removed operations and the 3 removed pseudoinstructions. More importantly, the correctness of these expansions is now proved as part of instruction selection, using the corresponding results from Floats.v.
* Add __builtin_sqrt as synonymous for __builtin_fsqrtXavier Leroy2020-07-271-1/+1
| | | | __builtin_sqrt (no "f") is the name used by GCC and Clang.
* No need to process __builtin_fabs in $ARCH/Asmexpand.mlXavier Leroy2020-07-271-2/+0
| | | | __builtin_fabs has already been expanded in backend/Selection.v .
* Added asserts for constraints of PowerPC builtinsBernhard Schommer2020-07-011-0/+6
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* Refine the type of function results in AST.signatureXavier Leroy2020-02-211-1/+1
| | | | | | | | | | Before it was "option typ". Now it is a proper inductive type that can also express small integer types (8/16-bit unsigned/signed integers). One benefit is that external functions get more precise types that control better their return values. As a consequence, the CompCert C type preservation property now holds unconditionally, without extra typing hypotheses on external functions.
* Compatibility for OCaml 4.08.1Bernhard Schommer2019-09-051-4/+4
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* bswap builtins: give semantics to them, support bswap64 on all targetsBernhard Schommer2019-08-121-0/+20
| | | | | | | | | | | | * Added semantic for byte swap builtins The `__builtin_bswap`, `__builtin_bswap16`, `__builtin_bswap32`, `__builtin_bswap64` builtin function are now standard builtin functions with a defined semantics. The semantics is given in terms of the decode/encode functions used for the memory model. * Added bswap64 expansion to PowerPC 32 bits. * Added bswap64 expansion for ARM.
* Provide a float select operation for PowerPC. (#173)Bernhard Schommer2019-05-281-0/+19
| | | | | | The FP select for PowerPC stores both addresses in two subsequent stack slots and loads them using an offset created from the result of the comparison.
* Emulate the "isel" instruction on non-EREF PPC processorsXavier Leroy2019-05-201-19/+39
| | | | | On non-EREF processors it expands to instructions that destroy GPR0. Reflect this in the Asm semantics for Pisel.
* Fix typo in asmexpand. Bug 24953Bernhard Schommer2018-11-071-1/+1
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* Switch conditions for eref plattforms.Bernhard Schommer2018-09-191-4/+4
| | | | | Otherwise an isel is generated if no isel is needed at all. Bug 24516
* Support __builtin_isel64 for non-EREF PPC64 platforms (#141)Xavier Leroy2018-09-181-22/+28
| | | | | | If the isel instruction is missing, it can be emulated just like we do in the 32-bit case (__builtin_isel). Follow-up to commit 51d32b92. Bug 24516
* Add builtin isel (conditional move) for int64, uint64 and _Bool (#140)Bernhard Schommer2018-09-181-1/+7
| | | | | New builtin isel variants to support conditional moves for 64bit integers and _Bool values. Bug 24516
* Generate a nop instruction after some ais annotations (#137)Bernhard Schommer2018-09-121-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | * Generate a nop instruction after ais annotations. In order to prevent the merging of ais annotations with following Labels a nop instruction is inserted, but only if the annotation is followed immediately by a label. The insertion of nop instructions is performed during the expansion of builtin and pseudo assembler instructions and is processor independent, by inserting a __builtin_nop built-in. * Add Pnop instruction to ARM, RISC-V, and x86 ARM as well as RISC-V don't have nop instructions that can be easily encoded by for example add with zero instructions. For x86 we used to use `mov X0, X0` for nop but this may not be as efficient as the true nop instruction. * Implement __builtin_nop on all supported target architectures. This builtin is not yet made available on the C side for all architectures. Bug 24067
* Fix typo in pattern match of error case, bug 24326Michael Schmidt2018-08-221-1/+1
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* Add new powerpc builtins.Michael Schmidt2018-04-271-0/+20
| | | | | | New builtin for 64-bit load/store with byte reversal and 64-bit mul-high. Bug 23541
* New support for inserting ais-annotations.Bernhard Schommer2017-10-191-4/+4
| | | | | | | | | | | | The ais annotations can be inserted via the new ais variants of the builtin annotation. They mainly differe in that they have an address format specifier '%addr' which will be replaced by the adress in the binary. The implementation simply prints a label for the builtin call alongside a the text of the annotation as comment and inserts the annotation together as acii string in a separate section 'ais_annotations' and replaces the usages of the address format specifiers by the address of the label of the builtin call.
* Extend builtin arguments with a pointer addition operator, continuedXavier Leroy2017-07-061-85/+148
| | | | | | | | - Add support for PowerPC, with all addressing modes. - Add support for ARM, with "reg + ofs" addressing mode. - Add support for RISC-V, with the one addressing mode. - Constprop.v: forgot to recurse in BA_addptr - volatile4 test: more tests
* bug 20956, print correct error message depending on architectureMichael Schmidt2017-05-031-2/+8
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* Hybrid 64bit/32bit PowerPC portBernhard Schommer2017-05-031-15/+60
| | | | | | | | | | | | | This commit adds code generation for 64bit PowerPC architectures which execute 32bit applications. The main difference to the normal 32bit PowerPC port is that it uses the available 64bit instructions instead of using the runtime library functions. However pointers are still 32bit and the 32bit calling convention is used. In order to use this port the target architecture must be either in Server execution mode or if in Embedded execution mode the high order 32 bits of GPRs must be implemented in 32-bit mode. Furthermore the operating system must preserve the high order 32 bits of GPRs.
* bug 19318, add implementation of __builtin_ctz, __builtin_ctzl and ↵Michael Schmidt2016-07-081-0/+26
| | | | __builtin_ctzll for PowerPC
* fix '__builtin_annot_val' to '__builtin_annot_intval', such that CompCert ↵Michael Schmidt2016-06-071-1/+1
| | | | can parse its own .compcert.c output, bug 18060
* Merge branch 'master' into cleanupBernhard Schommer2016-03-211-1/+1
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| * Add support for EF_runtime externalsXavier Leroy2016-03-061-1/+1
| | | | | | | | Also: in Events, use Senv.equiv to state invariance wrt changes of global envs.
* | Added interface for the Asmexpansion.Bernhard Schommer2016-03-161-4/+4
| | | | | | | | | | | | Hide the reference used internally behind the interface and added some functions to access the needed values. Bug 18394
* | Deactivate warning 27 and added back removed code.Bernhard Schommer2016-03-151-2/+2
| | | | | | | | | | | | The code was mostly there for documentation effort. So warning 27 is deactivated again. Bug 18349
* | Revert "Removed unused parameter from is_small/rel_data."Bernhard Schommer2016-03-151-4/+4
| | | | | | | | This reverts commit bac2a0854ea51217690bc6f225da62053ed7ac06.
* | Removed unused parameter from is_small/rel_data.Bernhard Schommer2016-03-111-4/+4
| | | | | | | | | | | | The ofs parameter is no longer used. Adopted the proofs and ml code using it. Bug 18394
* | Code cleanup.Bernhard Schommer2016-03-101-4/+2
|/ | | | | | Removed some unused variables, functions etc. and resolved some problems which occur if all warnings except 3,4,9 and 29 are active. Bug 18394.
* powerpc/Asmexpand: fix expansion of __builtin_clzllXavier Leroy2015-12-201-2/+2
| | | | The original code produces wrong results if res and al are the same register.
* bug 17752, fix semantics of builtin_set_spr64Michael Schmidt2015-12-161-1/+1
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* bug 17752, check target architecture for 64bit-builtinsMichael Schmidt2015-12-151-7/+13
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* bug 17752, rename builtin64_X to __builtin_X64Michael Schmidt2015-12-151-6/+6
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* bug 17752, add builtin64_set_spr and builtin64_get_spr for PowerPCMichael Schmidt2015-12-151-2/+17
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* bug 17752, add builtin_mr for PowerPCMichael Schmidt2015-12-141-2/+23
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* bug 17752, add builtin_clzl and builtin_clzll for PowerPCMichael Schmidt2015-12-111-1/+12
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* bug 17752, add builtin_nop for PowerPCMichael Schmidt2015-12-111-0/+0
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* bug 17752, add builtin_nop for PowerPCMichael Schmidt2015-12-111-0/+3
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* bug 17752, add builtin_uisel as unsigned version of builtin_iselMichael Schmidt2015-12-091-2/+2
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* Added special treatment for large stack size for ppc.Bernhard Schommer2015-10-231-3/+3
| | | | | | Since the stacksize is casted to signed int in the alloc frame function large stacksize lead to assembler containing overflows. Bug 17473.
* Merge remote-tracking branch 'origin/master' into named-externalsBernhard Schommer2015-10-201-3/+52
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arm/TargetPrinter.ml backend/CMparser.mly backend/SelectLongproof.v backend/Selectionproof.v cfrontend/C2C.ml checklink/Asm_printers.ml checklink/Check.ml checklink/Fuzz.ml common/AST.v debug/DebugInformation.ml debug/DebugInit.ml debug/DwarfPrinter.ml debug/DwarfTypes.mli debug/Dwarfgen.ml exportclight/ExportClight.ml ia32/TargetPrinter.ml powerpc/Asm.v powerpc/SelectOpproof.v powerpc/TargetPrinter.ml
| * Fix minor typo introduced by refactoring of debug information.Bernhard Schommer2015-10-121-1/+1
| | | | | | | | | | The base register for the stack allocated variables should be r1 and not r2 under powerpc. Bug 17392
| * Merge branch 'master' into ppc64Xavier Leroy2015-10-111-17/+100
| |\ | | | | | | | | | Resolved conflicts in:configure powerpc/Asmexpand.ml
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