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* Merge remote-tracking branch 'origin/kvx-work' into merge_master_8.13.1Cyril SIX2021-06-011-84/+113
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| * Removing addptrofs draft, next will be mergingLéo Gourdin2021-04-091-51/+47
| * Important commit on expansions' mini CSE, and a draft for addptrofsLéo Gourdin2021-04-061-65/+68
| * a more general way to manage special registers before introducing SPLéo Gourdin2021-03-301-49/+49
| * Now a more general way to perform imm operationsLéo Gourdin2021-03-301-13/+18
| * Refactoring the mayundef OP to be more general...Léo Gourdin2021-03-301-44/+23
| * Adding more expansions, improving miniCSE, and tuning prepassLéo Gourdin2021-03-261-9/+56
| * Adding a mini CSE pass in the expansion oracleLéo Gourdin2021-03-061-21/+20
* | replacing omega with lia in some fileLéo Gourdin2021-03-291-2/+2
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* Merge remote-tracking branch 'origin/riscV-cmov' into riscv-workLéo Gourdin2021-03-021-0/+107
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| * begin implementing selectDavid Monniaux2021-02-021-2/+55
| * bits to floatDavid Monniaux2021-02-011-1/+27
| * Obits_of_single etcDavid Monniaux2021-02-011-0/+28
* | Proof of fsval condition cmp okLéo Gourdin2021-03-011-4/+29
* | [Admitted checker] Duplicating Asm Ceq/Cne and draft checker proofLéo Gourdin2021-02-111-21/+29
* | cond and branches expandedLéo Gourdin2021-02-061-1/+15
* | All Ocmp expanded in RTLLéo Gourdin2021-02-031-0/+7
* | Ccomp for longLéo Gourdin2021-02-031-0/+57
* | Ccompu expansionLéo Gourdin2021-02-021-2/+5
* | Expansion of Ccompimm in RTL [Admitted checker]Léo Gourdin2021-02-021-0/+44
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* risc-V now without trapping instructionsDavid Monniaux2020-09-211-8/+8
* moved Risc-V div ValueAOp to central locationDavid Monniaux2020-09-211-293/+0
* maketotal mod & divDavid Monniaux2020-09-211-8/+302
* RISC-V port and assorted changesXavier Leroy2017-04-281-0/+218
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