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* écrase X31riscV-cmovDavid Monniaux2021-02-031-1/+2
* Merge remote-tracking branch 'origin/kvx-work' into riscV-cmovDavid Monniaux2021-02-031-1/+1
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| * fix OpWeightsDavid Monniaux2021-01-301-1/+1
* | detect redundant cmovDavid Monniaux2021-02-022-3/+34
* | fix code generation for select(b, r, r)David Monniaux2021-02-021-2/+7
* | fix problem if rt = rfDavid Monniaux2021-02-021-6/+8
* | Cmov TsingleDavid Monniaux2021-02-023-33/+43
* | implement for another register configurationDavid Monniaux2021-02-021-1/+8
* | some more cases implementedDavid Monniaux2021-02-021-12/+25
* | PselectdDavid Monniaux2021-02-023-0/+33
* | cmov on integersDavid Monniaux2021-02-022-11/+88
* | begin synthesizing selectDavid Monniaux2021-02-023-2/+34
* | asmgen OselectlDavid Monniaux2021-02-022-0/+11
* | begin implementing selectDavid Monniaux2021-02-027-6/+113
* | select01_longDavid Monniaux2021-02-011-130/+10
* | repr etc.David Monniaux2021-02-011-4/+2
* | bitwise_select_value_correctDavid Monniaux2021-02-011-0/+12
* | int64_of_value some moreDavid Monniaux2021-02-011-14/+15
* | int64_of_valueDavid Monniaux2021-02-011-0/+77
* | Asmgen for bits / floatDavid Monniaux2021-02-011-0/+13
* | bits to floatDavid Monniaux2021-02-019-5/+82
* | adding builtinsDavid Monniaux2021-02-014-6/+27
* | Obits_of_single etcDavid Monniaux2021-02-013-3/+46
* | define some semantics in AsmDavid Monniaux2021-02-012-3/+24
* | select_longDavid Monniaux2021-01-301-0/+38
* | select through bitwise operationsDavid Monniaux2021-01-301-0/+40
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* Merge remote-tracking branch 'origin/kvx-work' into kvx-better2-cse3David Monniaux2020-12-085-26/+136
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| * Merge branch 'kvx-work' into kvx-work-merge3.8Cyril SIX2020-12-0411-242/+577
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| * \ Merge branch 'master' (Absint 3.8) into kvx-work-merge3.8David Monniaux2020-11-185-26/+136
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| | * | Support the use of already-installed MenhirLib and Flocq librariesXavier Leroy2020-09-211-2/+1
| | * | Add __builtin_sqrt as synonymous for __builtin_fsqrtXavier Leroy2020-07-271-1/+1
| | * | RISC-V implementation of __builtin_clz* and __builtin_ctz*Xavier Leroy2020-07-272-0/+134
| | * | No need to process __builtin_fabs in $ARCH/Asmexpand.mlXavier Leroy2020-07-271-2/+0
| | * | Move shared code in new file.Bernhard Schommer2020-06-282-18/+0
| | * | Remove the `can_reserve_register` function.Bernhard Schommer2020-06-282-3/+0
| | * | Use Hashtbl.find_opt.Bernhard Schommer2020-06-281-1/+1
* | | | Merge remote-tracking branch 'origin/kvx-work' into kvx-better2-cse3David Monniaux2020-12-029-239/+553
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| * | | Merge remote-tracking branch 'origin/kvx-work' into kvx-test-prepassDavid Monniaux2020-11-242-3/+14
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| * | | | allow changing the target coreDavid Monniaux2020-10-222-120/+160
| * | | | attempt at modeling RocketDavid Monniaux2020-10-221-0/+83
| * | | | proves op_valid_pointer_eq lemma for RISC-V (necessary for the pre-pass sched...Sylvain Boulmé2020-10-171-0/+10
| * | | | so that all architectures compileDavid Monniaux2020-10-022-8/+16
| * | | | Merge remote-tracking branch 'origin/kvx-work-riscV' into kvx-test-prepassDavid Monniaux2020-09-216-239/+390
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| | * | | | risc-V now without trapping instructionsDavid Monniaux2020-09-214-74/+90
| | * | | | moved Risc-V div ValueAOp to central locationDavid Monniaux2020-09-211-293/+0
| | * | | | maketotal mod & divDavid Monniaux2020-09-216-165/+593
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| * | | | wrong resourcesDavid Monniaux2020-09-181-1/+1
| * | | | EH1 schedulingDavid Monniaux2020-09-181-5/+18
| * | | | bogus OpWeights for Risc-VDavid Monniaux2020-09-181-0/+19
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* | | | op_depends_on_memory_correctDavid Monniaux2020-11-251-6/+24
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