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compcert-kvx
CPP22_if_lifting
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riscV
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Merge branch 'dm-leaf' of https://github.com/monniaux/CompCert into mppa-work
David Monniaux
2020-03-26
1
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Update the RISC-V calling conventions, continued (#227)
Xavier Leroy
2020-03-02
1
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+10
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riscV/DuplicateOpcodeHeuristic.ml
David Monniaux
2020-03-17
1
-3
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+27
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fixes for risc-V
David Monniaux
2020-03-03
1
-1
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+1
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fix for risc-V
David Monniaux
2020-03-03
1
-9
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+7
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fixed CSE2 for mppa_k1c
David Monniaux
2020-03-03
2
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+149
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CSE2 alias analysis for Risc-V
David Monniaux
2020-03-03
2
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+149
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Merge branch 'mppa-cse2' of gricad-gitlab.univ-grenoble-alpes.fr:sixcy/CompCe...
David Monniaux
2020-03-03
11
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Merge branch 'master' of https://github.com/AbsInt/CompCert into mppa-work-up...
David Monniaux
2020-02-08
1
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+2
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stubs to keep compiling on architectures not K1c
David Monniaux
2020-02-07
1
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+3
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Merge branch 'dm-div2' of https://github.com/monniaux/CompCert into mppa-work
David Monniaux
2020-01-15
3
-28
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+51
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64-bit signed division by two code
David Monniaux
2020-01-14
3
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+26
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rv32: 3-instruction signed divide-by-two sequence (as opposed to 4)
David Monniaux
2020-01-14
3
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+25
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Merge remote-tracking branch 'origin/mppa-work' into mppa-non-trapping-load
David Monniaux
2019-12-02
1
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+2
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fix compile for rv32
David Monniaux
2019-10-16
1
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+2
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[regression to check!] Merge tag 'v3.6' into mppa-work
Cyril SIX
2019-10-16
2
-22
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+6
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trapping ops on rv
David Monniaux
2019-09-24
1
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+30
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Merge tag 'v3.6_mppa_2019-09-20' of gricad-gitlab.univ-grenoble-alpes.fr:sixc...
David Monniaux
2019-09-20
2
-22
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+6
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Merge tag 'v3.6' of https://github.com/AbsInt/CompCert into mppa-work-upstrea...
David Monniaux
2019-09-20
2
-22
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+6
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fix for Risc-V
David Monniaux
2019-09-07
4
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+34
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PowerPC compiles
David Monniaux
2019-09-07
1
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+26
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Merge branch 'master' of https://github.com/AbsInt/CompCert into mppa-work-up...
David Monniaux
2019-08-28
1
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+0
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helpers broke compilation
David Monniaux
2019-07-19
2
-7
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+2
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Merge branch 'master' of https://github.com/AbsInt/CompCert into mppa-work-up...
David Monniaux
2019-07-19
6
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+85
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Merge branch 'if-conversion' of https://github.com/AbsInt/CompCert into mppa-...
David Monniaux
2019-06-03
6
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+50
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Risc-V works again (32/64).
David Monniaux
2019-03-22
4
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+36
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try to be portable across archs
David Monniaux
2019-03-21
2
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+7
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Update the RISC-V calling conventions (#221)
Xavier Leroy
2020-02-26
2
-137
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+149
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Platform-independent implementation of Conventions.size_arguments (#222)
Xavier Leroy
2020-02-24
1
-64
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+0
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Cosmetic: in OCaml code, write "open! Module" instead of "open !Module"
Xavier Leroy
2020-02-21
1
-1
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+1
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Support re-normalization of values returned by function calls
Xavier Leroy
2020-02-21
1
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+6
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Refine the type of function results in AST.signature
Xavier Leroy
2020-02-21
2
-12
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+11
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Incorrect computation of extra stack size for vararg calls in RISC-V (#213)
Bernhard Schommer
2020-02-05
1
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Revert "Remove `__builtin_nop` for some architectures. (#208)"
Bernhard Schommer
2020-01-03
3
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+7
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Remove `__builtin_nop` for some architectures. (#208)
Bernhard Schommer
2019-12-21
3
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Merge pull request #313 from AbsInt/aarch64
Xavier Leroy
2019-09-11
2
-22
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+6
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Fix compile for architectures other than AArch64 (#192)
Bernhard Schommer
2019-08-17
2
-6
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+6
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AArch64 port
Xavier Leroy
2019-08-08
1
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+0
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bswap builtins: give semantics to them, support bswap64 on all targets
Bernhard Schommer
2019-08-12
1
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+0
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Give formal semantics to some built-in functions and run-time functions
Xavier Leroy
2019-07-17
3
-17
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+56
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Remove the cparser/Builtins module
Xavier Leroy
2019-07-17
1
-2
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+2
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Add floating-point square root and fused multiply-add
Xavier Leroy
2019-07-17
1
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+5
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Revised specification of NaN payload behavior
Xavier Leroy
2019-07-12
1
-13
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+15
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Extended asm: print register names according to their types
Xavier Leroy
2019-06-17
1
-2
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+2
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Fix misspellings in messages, man pages, and comments
Xavier Leroy
2019-05-31
1
-1
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+1
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Provide a default "select" operation for the RiscV port
Xavier Leroy
2019-05-20
2
-0
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+20
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Added options -fcommon and -fno-common (#164)
Bernhard Schommer
2019-05-10
1
-2
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+2
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Move Z definitions out of Integers and into Zbits
Xavier Leroy
2019-04-26
2
-10
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+11
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Upgrade embedded version of Flocq to 3.1.
Guillaume Melquiond
2019-03-27
1
-14
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+16
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Generate a nop instruction after some ais annotations (#137)
Bernhard Schommer
2018-09-12
3
-7
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+9
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