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author | Xavier Leroy <xavier.leroy@college-de-france.fr> | 2023-02-20 15:54:42 +0100 |
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committer | Xavier Leroy <xavier.leroy@college-de-france.fr> | 2023-02-20 15:54:42 +0100 |
commit | f88828d8024fe2adf9dd76d3c8c59c36fbe1a599 (patch) | |
tree | 9243f1cdbf0f671a66beff11b7d2f5569922d3bd | |
parent | bdcd260ab0e6f2453069f348a5ba3d8e3ca38ce2 (diff) | |
download | compcert-f88828d8024fe2adf9dd76d3c8c59c36fbe1a599.tar.gz compcert-f88828d8024fe2adf9dd76d3c8c59c36fbe1a599.zip |
Fix Thumb handling of `add reg, sp, #imm` and `sub reg, sp, #imm`
Don't add `s` suffix if source register is R13 (SP), so as to enable
16-bit instruction encodings.
-rw-r--r-- | arm/TargetPrinter.ml | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arm/TargetPrinter.ml b/arm/TargetPrinter.ml index 3f67dc24..4a7bb611 100644 --- a/arm/TargetPrinter.ml +++ b/arm/TargetPrinter.ml @@ -211,7 +211,7 @@ struct fprintf oc " adc %a, %a, %a\n" ireg r1 ireg r2 shift_op so | Padd(r1, r2, so) -> fprintf oc " add%s %a, %a, %a\n" - (if !Clflags.option_mthumb && r2 <> IR14 then "s" else "") + (if !Clflags.option_mthumb && r2 <> IR13 then "s" else "") ireg r1 ireg r2 shift_op so | Padds (r1,r2,so) -> fprintf oc " adds %a, %a, %a\n" ireg r1 ireg r2 shift_op so @@ -333,8 +333,9 @@ struct | Psmull(r1, r2, r3, r4) -> fprintf oc " smull %a, %a, %a, %a\n" ireg r1 ireg r2 ireg r3 ireg r4 | Psub(r1, r2, so) -> - fprintf oc " sub%t %a, %a, %a\n" - thumbS ireg r1 ireg r2 shift_op so + fprintf oc " sub%s %a, %a, %a\n" + (if !Clflags.option_mthumb && r2 <> IR13 then "s" else "") + ireg r1 ireg r2 shift_op so | Psubs(r1, r2, so) -> fprintf oc " subs %a, %a, %a\n" ireg r1 ireg r2 shift_op so |