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| author | Xavier Leroy <xavierleroy@users.noreply.github.com> | 2022-10-24 11:04:31 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-10-24 11:04:31 +0200 |
| commit | 0fca312236475ccc2de12da45221c311d99a19d1 (patch) | |
| tree | 7c9a09783910292d351df9f64ef4a494d7955094 /riscV | |
| parent | a1f01c844aaa0ff41aa9095e9d5d01606a0e90c9 (diff) | |
| download | compcert-0fca312236475ccc2de12da45221c311d99a19d1.tar.gz compcert-0fca312236475ccc2de12da45221c311d99a19d1.zip | |
Use .data.rel.ro section for const data with relocatable inits on ELF targets (#457)
Follow-up to ed89275cb.
AArch64, ARM, RISC-V and x86 ELF targets are changed.
PowerPC / ELF is unchanged because we use the EABI variant, which has
no `.data.rel.ro` section as far as I can see in GCC's output.
(The SVR4 variant has `.data.rel.ro` but does not have `.sdata2`,
which CompCert uses.)
Fixes: #454
Diffstat (limited to 'riscV')
| -rw-r--r-- | riscV/TargetPrinter.ml | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/riscV/TargetPrinter.ml b/riscV/TargetPrinter.ml index 373bd1a5..3d258257 100644 --- a/riscV/TargetPrinter.ml +++ b/riscV/TargetPrinter.ml @@ -110,7 +110,10 @@ module Target : TARGET = | Section_data i | Section_small_data i -> variable_section ~sec:".data" ~bss:".bss" i | Section_const i | Section_small_const i -> - variable_section ~sec:".section .rodata" i + variable_section + ~sec:".section .rodata" + ~reloc:".section .data.rel.ro,\"aw\",@progbits" + i | Section_string sz -> elf_mergeable_string_section sz ".section .rodata" | Section_literal sz -> |