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authorXavier Leroy <xavier.leroy@college-de-france.fr>2019-05-31 11:55:57 +0200
committerXavier Leroy <xavier.leroy@college-de-france.fr>2019-05-31 12:00:37 +0200
commit8b0724fdb1af4f89a603f7bde4b5b625c870e111 (patch)
tree728c79a8ed3f2d99a24d181f712665f3a80fbd23 /riscV
parente10555313645cf3c35f244f42afa5a03fba2bac1 (diff)
downloadcompcert-8b0724fdb1af4f89a603f7bde4b5b625c870e111.tar.gz
compcert-8b0724fdb1af4f89a603f7bde4b5b625c870e111.zip
Fix misspellings in messages, man pages, and comments
This is a manual, partial merge of Github pull request #296 by @Fourchaux. flocq/, cparser/MenhirLib/ and parts of test/ have not been changed because these are local copies and the fixes should be performed upstream.
Diffstat (limited to 'riscV')
-rw-r--r--riscV/Asm.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/riscV/Asm.v b/riscV/Asm.v
index 1d8fda11..dc410a3b 100644
--- a/riscV/Asm.v
+++ b/riscV/Asm.v
@@ -369,7 +369,7 @@ lbl:
- [Ploadfi rd fval]: similar to [Ploadli] but loads a double FP constant fval
into a float register rd.
-- [Ploadsi rd fval]: similar to [Ploadli] but loads a singe FP constant fval
+- [Ploadsi rd fval]: similar to [Ploadli] but loads a single FP constant fval
into a float register rd.
- [Pallocframe sz pos]: in the formal semantics, this