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authorYann Herklotz <git@yannherklotz.com>2023-04-27 16:32:13 +0100
committerYann Herklotz <git@yannherklotz.com>2023-04-27 16:32:13 +0100
commitab617cf8e6e60e8de3eb8de220f71dd05c18209f (patch)
tree1e2da8e3edbf48d02f536a21f2cafb6167045c51 /verilog/Machregs.v
parentf0867a37e28a1f3670362e7935f9ef30988ddb92 (diff)
downloadcompcert-ab617cf8e6e60e8de3eb8de220f71dd05c18209f.tar.gz
compcert-ab617cf8e6e60e8de3eb8de220f71dd05c18209f.zip
Update verilog back end with new x86 changesHEADmaster
Diffstat (limited to 'verilog/Machregs.v')
-rw-r--r--verilog/Machregs.v6
1 files changed, 4 insertions, 2 deletions
diff --git a/verilog/Machregs.v b/verilog/Machregs.v
index 6f3064b8..042248a8 100644
--- a/verilog/Machregs.v
+++ b/verilog/Machregs.v
@@ -57,9 +57,9 @@ Proof.
intros. specialize (H r). InvBooleans. auto.
Qed.
-Instance Decidable_eq_mreg : forall (x y: mreg), Decidable (eq x y) := Decidable_eq mreg_eq.
+Global Instance Decidable_eq_mreg : forall (x y: mreg), Decidable (eq x y) := Decidable_eq mreg_eq.
-Instance Finite_mreg : Finite mreg := {
+Global Instance Finite_mreg : Finite mreg := {
Finite_elements := all_mregs;
Finite_elements_spec := all_mregs_complete
}.
@@ -334,6 +334,8 @@ Definition two_address_op (op: operation) : bool :=
| Osubf => true
| Omulf => true
| Odivf => true
+ | Omaxf => true
+ | Ominf => true
| Onegfs => true
| Oabsfs => true
| Oaddfs => true