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authorClifford Wolf <clifford@clifford.at>2015-06-07 20:59:20 +0200
committerClifford Wolf <clifford@clifford.at>2015-06-07 20:59:20 +0200
commit06ba3a1a574f1fae39d9a57ffe602b72143e3d2b (patch)
tree1a33ba0266167871ea9d3445a473fe712d7dd02d
parent34d9dea8c79e38c1abda85fdab5d2fcc75d6a218 (diff)
downloadpicorv32-06ba3a1a574f1fae39d9a57ffe602b72143e3d2b.tar.gz
picorv32-06ba3a1a574f1fae39d9a57ffe602b72143e3d2b.zip
README Updates
-rw-r--r--README.md8
1 files changed, 6 insertions, 2 deletions
diff --git a/README.md b/README.md
index 9bfa8c3..762acd0 100644
--- a/README.md
+++ b/README.md
@@ -26,9 +26,13 @@ For even smaller size it is possible disable support for registers `x16`..`x31`
well as `RDCYCLE[H]`, `RDTIME[H]`, and `RDINSTRET[H]` instructions, turning the
processor into an RV32E core.
+Furthermore it is possible to choose between a single-port and a dual-port
+register file implementation. The former provides better performance while
+the latter results in a smaller core.
+
*Note: In architectures that implement the register file in dedicated memory
-resources, such as many FPGAs, disabling the 16 upper registers may not further
-reduce the core size.*
+resources, such as many FPGAs, disabling the 16 upper registers and/or
+disabling the dual-port register file may not further reduce the core size.*
The core exists in two variations: `picorv32` and `picorv32_axi`. The former
provides a simple native memory interface, that is easy to use in simple