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authorClaire Wolf <clifford@clifford.at>2020-04-22 17:25:28 +0200
committerGitHub <noreply@github.com>2020-04-22 17:25:28 +0200
commit65e72ea49e7a15b56ad27eceef1e94f213234b4f (patch)
tree91e8215c44404d5689441c12e28ecf180f9898fe
parentfb34c8aca924cd250d83d57694f8c7550483fafd (diff)
parentb428e843cdd6a75fd256c02b02962953334cc8dd (diff)
downloadpicorv32-65e72ea49e7a15b56ad27eceef1e94f213234b4f.tar.gz
picorv32-65e72ea49e7a15b56ad27eceef1e94f213234b4f.zip
Merge pull request #156 from dehann/patch-1
fix readme icebreaker links
-rw-r--r--picosoc/README.md28
1 files changed, 14 insertions, 14 deletions
diff --git a/picosoc/README.md b/picosoc/README.md
index 4d02128..1f649c3 100644
--- a/picosoc/README.md
+++ b/picosoc/README.md
@@ -28,20 +28,20 @@ and upload them to a connected iCE40-HX8K Breakout Board.
Run `make icebprog` to build the configuration bit-stream and firmware images
and upload them to a connected iCEBreaker Board.
-| File | Description |
-| --------------------------------- | --------------------------------------------------------------- |
-| [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module |
-| [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash |
-| [simpleuart.v](simpleuart.v) | Simple UART core connected directly to SoC TX/RX lines |
-| [start.s](start.s) | Assembler source for firmware.hex/firmware.bin |
-| [firmware.c](firmware.c) | C source for firmware.hex/firmware.bin |
-| [sections.lds](sections.lds) | Linker script for firmware.hex/firmware.bin |
-| [hx8kdemo.v](hx8kdemo.v) | FPGA-based example implementation on iCE40-HX8K Breakout Board |
-| [hx8kdemo.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCE40-HX8K Breakout Board |
-| [hx8kdemo\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCE40-HX8K Breakout Board |
-| [icebreaker.v](hx8kdemo.v) | FPGA-based example implementation on iCEBreaker Board |
-| [icebreaker.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCEBreaker Board |
-| [icebreaker\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCEBreaker Board |
+| File | Description |
+| ----------------------------------- | --------------------------------------------------------------- |
+| [picosoc.v](picosoc.v) | Top-level PicoSoC Verilog module |
+| [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash |
+| [simpleuart.v](simpleuart.v) | Simple UART core connected directly to SoC TX/RX lines |
+| [start.s](start.s) | Assembler source for firmware.hex/firmware.bin |
+| [firmware.c](firmware.c) | C source for firmware.hex/firmware.bin |
+| [sections.lds](sections.lds) | Linker script for firmware.hex/firmware.bin |
+| [hx8kdemo.v](hx8kdemo.v) | FPGA-based example implementation on iCE40-HX8K Breakout Board |
+| [hx8kdemo.pcf](hx8kdemo.pcf) | Pin constraints for implementation on iCE40-HX8K Breakout Board |
+| [hx8kdemo\_tb.v](hx8kdemo_tb.v) | Testbench for implementation on iCE40-HX8K Breakout Board |
+| [icebreaker.v](icebreaker.v) | FPGA-based example implementation on iCEBreaker Board |
+| [icebreaker.pcf](icebreaker.pcf) | Pin constraints for implementation on iCEBreaker Board |
+| [icebreaker\_tb.v](icebreaker_tb.v) | Testbench for implementation on iCEBreaker Board |
### Memory map: