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| author | Clifford Wolf <clifford@clifford.at> | 2015-11-15 23:24:38 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-11-15 23:24:38 +0100 |
| commit | 8174d8fb7e97d6257c4f67267aea0223dba147b5 (patch) | |
| tree | f319eee76083b18bb67d330c8bae889121c90e38 | |
| parent | bfd2a4e0fa624503bb325379ef6b5d32f4c0cb3d (diff) | |
| download | picorv32-8174d8fb7e97d6257c4f67267aea0223dba147b5.tar.gz picorv32-8174d8fb7e97d6257c4f67267aea0223dba147b5.zip | |
Towards compressed ISA support
| -rw-r--r-- | Makefile | 11 | ||||
| -rw-r--r-- | picorv32.v | 4 | ||||
| -rw-r--r-- | testbench.v | 4 |
3 files changed, 12 insertions, 7 deletions
@@ -4,6 +4,7 @@ FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve. GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion TOOLCHAIN_PREFIX = riscv32-unknown-elf- +# COMPRESSED_ISA = C test: testbench.exe firmware/firmware.hex vvp -N testbench.exe @@ -33,15 +34,15 @@ test_synth: testbench_synth.exe firmware/firmware.hex vvp -N testbench_synth.exe testbench.exe: testbench.v picorv32.v - iverilog -o testbench.exe testbench.v picorv32.v + iverilog -o testbench.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) testbench.v picorv32.v chmod -x testbench.exe testbench_sp.exe: testbench.v picorv32.v - iverilog -o testbench_sp.exe -DSP_TEST testbench.v picorv32.v + iverilog -o testbench_sp.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DSP_TEST testbench.v picorv32.v chmod -x testbench_sp.exe testbench_axi.exe: testbench.v picorv32.v - iverilog -o testbench_axi.exe -DAXI_TEST testbench.v picorv32.v + iverilog -o testbench_axi.exe $(subst $(COMPRESSED_ISA),C,-DCOMPRESSED_ISA) -DAXI_TEST testbench.v picorv32.v chmod -x testbench_axi.exe testbench_synth.exe: testbench.v synth.v @@ -65,10 +66,10 @@ firmware/firmware.elf: $(FIRMWARE_OBJS) $(TEST_OBJS) firmware/sections.lds chmod -x $@ firmware/start.o: firmware/start.S - $(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IMXcustom -o $@ $< + $(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM$(COMPRESSED_ISA)Xcustom -o $@ $< firmware/%.o: firmware/%.c - $(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32I -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $< + $(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32I$(COMPRESSED_ISA) -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $< tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h $(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \ @@ -231,7 +231,7 @@ module picorv32 #( always @(posedge clk) begin if (mem_valid && mem_ready) begin - mem_rdata_q <= mem_rdata; + mem_rdata_q <= COMPRESSED_ISA ? mem_rdata_latched : mem_rdata; if (COMPRESSED_ISA && mem_do_rinst) begin case (mem_rdata_latched[1:0]) @@ -1456,6 +1456,7 @@ module picorv32_axi #( parameter [ 0:0] TWO_STAGE_SHIFT = 1, parameter [ 0:0] TWO_CYCLE_COMPARE = 0, parameter [ 0:0] TWO_CYCLE_ALU = 0, + parameter [ 0:0] COMPRESSED_ISA = 0, parameter [ 0:0] CATCH_MISALIGN = 1, parameter [ 0:0] CATCH_ILLINSN = 1, parameter [ 0:0] ENABLE_PCPI = 0, @@ -1553,6 +1554,7 @@ module picorv32_axi #( .TWO_STAGE_SHIFT (TWO_STAGE_SHIFT ), .TWO_CYCLE_COMPARE (TWO_CYCLE_COMPARE ), .TWO_CYCLE_ALU (TWO_CYCLE_ALU ), + .COMPRESSED_ISA (COMPRESSED_ISA ), .CATCH_MISALIGN (CATCH_MISALIGN ), .CATCH_ILLINSN (CATCH_ILLINSN ), .ENABLE_PCPI (ENABLE_PCPI ), diff --git a/testbench.v b/testbench.v index 4703f3a..c23f6b3 100644 --- a/testbench.v +++ b/testbench.v @@ -7,7 +7,6 @@ `timescale 1 ns / 1 ps // `define VERBOSE -// `define AXI_TEST module testbench; @@ -55,6 +54,9 @@ module testbench; `ifdef SP_TEST .ENABLE_REGS_DUALPORT(0), `endif +`ifdef COMPRESSED_ISA + .COMPRESSED_ISA(1), +`endif .ENABLE_MUL(1), .ENABLE_IRQ(1) ) uut ( |