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author | Austin Seipp <aseipp@pobox.com> | 2019-01-11 16:49:18 -0600 |
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committer | Austin Seipp <aseipp@pobox.com> | 2019-01-11 16:49:18 -0600 |
commit | af3b1bb75de312db5e7c3c840787b96b0e5853d9 (patch) | |
tree | 97a1d6a5b232bc89c90a0b0722609cd99500ce59 | |
parent | 770b5bd4c6e9383e840319c69a64dfb47be833d4 (diff) | |
download | picorv32-af3b1bb75de312db5e7c3c840787b96b0e5853d9.tar.gz picorv32-af3b1bb75de312db5e7c3c840787b96b0e5853d9.zip |
scripts/icestorm: dedupe calls to yosys-config
Signed-off-by: Austin Seipp <aseipp@pobox.com>
-rw-r--r-- | scripts/icestorm/Makefile | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile index 2337600..a9391fc 100644 --- a/scripts/icestorm/Makefile +++ b/scripts/icestorm/Makefile @@ -1,5 +1,7 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf- +ICE40_SIM_CELLS=$(shell yosys-config --datdir/ice40/cells_sim.v) + # set to 4 for simulation FIRMWARE_COUNTER_BITS=18 @@ -52,7 +54,7 @@ example_sim_vcd: example_tb.vvp ## post-synth simulation synth_tb.vvp: example_tb.v synth.json - iverilog -o $@ -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v` + iverilog -o $@ -s testbench synth.v example_tb.v $(ICE40_SIM_CELLS) chmod -x $@ synth_sim: synth_tb.vvp @@ -68,7 +70,7 @@ route.v: example.asc example.pcf icebox_vlog -L -n top -sp example.pcf $< > $@ route_tb.vvp: route.v example_tb.v - iverilog -o $@ -s testbench $^ `yosys-config --datdir/ice40/cells_sim.v` + iverilog -o $@ -s testbench $^ $(ICE40_SIM_CELLS) chmod -x $@ route_sim: route_tb.vvp |