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author | Clifford Wolf <clifford@clifford.at> | 2016-12-15 14:23:20 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-12-15 14:23:20 +0100 |
commit | 92df4b35eea1449440912e44704f112ba07973b8 (patch) | |
tree | aa74f8f7f90654cda48e5375707cc4306c27248f /Makefile | |
parent | 9d873cac925246c38d86d644787d159efb9855a0 (diff) | |
parent | ef86b30b2598df6993a473222ebe355b0348e226 (diff) | |
download | picorv32-92df4b35eea1449440912e44704f112ba07973b8.tar.gz picorv32-92df4b35eea1449440912e44704f112ba07973b8.zip |
Merge branch 'master' into riscv-gnu-toolchain-update
Diffstat (limited to 'Makefile')
-rw-r--r-- | Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -49,7 +49,7 @@ testbench_sp.vvp: testbench.v picorv32.v chmod -x testbench_sp.vvp testbench_synth.vvp: testbench.v synth.v - iverilog -o testbench_synth.vvp testbench.v synth.v + iverilog -o testbench_synth.vvp -DSYNTH_TEST testbench.v synth.v chmod -x testbench_synth.vvp synth.v: picorv32.v scripts/yosys/synth_sim.ys |