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authorClifford Wolf <clifford@clifford.at>2017-05-27 19:58:44 +0200
committerClifford Wolf <clifford@clifford.at>2017-05-27 19:58:44 +0200
commitf295b900bcb7e67eb2f767defa5aba6a9effce4c (patch)
tree48ab26528923c4a85d65851a52545873f2c3a995 /Makefile
parentbb9ebeb9e37bc6103f527b434a13d9b4889a796b (diff)
downloadpicorv32-f295b900bcb7e67eb2f767defa5aba6a9effce4c.tar.gz
picorv32-f295b900bcb7e67eb2f767defa5aba6a9effce4c.zip
Add RVFI to AXI and WB wrappers modules, Add RVFI monitor support to test bench
Diffstat (limited to 'Makefile')
-rw-r--r--Makefile6
1 files changed, 3 insertions, 3 deletions
diff --git a/Makefile b/Makefile
index 1655bdf..00f4cc7 100644
--- a/Makefile
+++ b/Makefile
@@ -47,15 +47,15 @@ test_synth: testbench_synth.vvp firmware/firmware.hex
vvp -N $<
testbench.vvp: testbench.v picorv32.v
- iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL $^
+ iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) $^
chmod -x $@
testbench_wb.vvp: testbench_wb.v picorv32.v
- iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL $^
+ iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) $^
chmod -x $@
testbench_sp.vvp: testbench.v picorv32.v
- iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DRISCV_FORMAL -DSP_TEST $^
+ iverilog -o $@ $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DSP_TEST $^
chmod -x $@
testbench_synth.vvp: testbench.v synth.v