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| author | Clifford Wolf <clifford@clifford.at> | 2015-07-01 21:20:51 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2015-07-01 21:20:51 +0200 |
| commit | 34193bf9dfdde60a1c44b323a7e8559e84edf3a1 (patch) | |
| tree | 6e893200c2a9a8cec7ace4a56981c5ff467faf2a /README.md | |
| parent | f6fe27ecbf6c759929cddef22b73625bc155d9e8 (diff) | |
| download | picorv32-34193bf9dfdde60a1c44b323a7e8559e84edf3a1.tar.gz picorv32-34193bf9dfdde60a1c44b323a7e8559e84edf3a1.zip | |
Added CATCH_MISALIGN and CATCH_ILLINSN
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 9 |
1 files changed, 9 insertions, 0 deletions
@@ -158,6 +158,15 @@ latches the value internally. This parameter is only available for the `picorv32` core. In the `picorv32_axi` core this is implicitly set to 0. +#### CATCH_MISALIGN (default = 1) + +Set this to 0 to disable the circuitry for catching misaligned memory +accesses. + +#### CATCH_ILLINSN (default = 1) + +Set this to 0 to disable the circuitry for catching illegal instructions. + #### ENABLE_PCPI (default = 0) Set this to 1 to enable the Pico Co-Processor Interface (PCPI). |