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| author | Clifford Wolf <clifford@clifford.at> | 2015-06-28 22:09:51 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-06-28 22:09:51 +0200 |
| commit | 46026ba985d1ffb062802651d99ae34d5b1f773d (patch) | |
| tree | e9902a57af68346e0b8f68d0fae2a72e5047fa17 /README.md | |
| parent | e5e5494ca2a23ff2ae627fbb838ee564888e381d (diff) | |
| download | picorv32-46026ba985d1ffb062802651d99ae34d5b1f773d.tar.gz picorv32-46026ba985d1ffb062802651d99ae34d5b1f773d.zip | |
Added ENABLE_IRQ_QREGS and ENABLE_IRQ_TIMER
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 14 |
1 files changed, 13 insertions, 1 deletions
@@ -153,7 +153,19 @@ interface only becomes functional when ENABLE_PCPI is set as well. #### ENABLE_IRQ (default = 0) -Set this to 1 to enable IRQs. +Set this to 1 to enable IRQs. (see "" below for a discussion of IRQs) + +#### ENABLE_IRQ_QREGS (default = 1) + +Set this to 0 to disable support for the `getq` and `setq` instructions. Without +the q-registers, the irq return address will be stored in x3 (gp) and the IRQ +bitmask in x4 (tp), the global pointer and thread pointer registers according +to the RISC-V ABI. Code generated from ordinary C code will not interact with +those registers. + +#### ENABLE_IRQ_TIMER (default = 1) + +Set this to 0 to disable support for the `timer` instruction. #### MASKED_IRQ (default = 32'h 0000_0000) |