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| author | Clifford Wolf <clifford@clifford.at> | 2015-06-26 23:49:16 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-06-26 23:49:16 +0200 |
| commit | 617fa9d80a2d7afc115c96f2dd76f37a97cef866 (patch) | |
| tree | 419af84380667f0e1dca4fc291948aca3a5ad631 /README.md | |
| parent | dd8ed3c87714d3deee705242aef4b7fb0aa21dad (diff) | |
| download | picorv32-617fa9d80a2d7afc115c96f2dd76f37a97cef866.tar.gz picorv32-617fa9d80a2d7afc115c96f2dd76f37a97cef866.zip | |
Added PCPI to README
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 16 |
1 files changed, 16 insertions, 0 deletions
@@ -83,6 +83,10 @@ transaction. In the default configuration the PicoRV32 core only expects the `mem_rdata` input to be valid in the cycle with `mem_valid && mem_ready` and latches the value internally. +#### ENABLE_PCPI (default = 0) + +Set this to 1 to enable the Pico Co-Processor Interface (PCPI). + #### ENABLE_IRQ (default = 0) Set this to 1 to enable IRQs. @@ -131,6 +135,18 @@ Dhrystone benchmark results: 0.309 DMIPS/MHz (544 Dhrystones/Second/MHz) For the Dhrystone benchmark the average CPI is 4.167. +PicoRV32 Native Memory Interface +-------------------------------- + +This section is under construction. + + +Pico Co-Processor Interface (PCPI) +---------------------------------- + +This section is under construction. + + Custom Instructions for IRQ Handling ------------------------------------ |