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authorClifford Wolf <clifford@clifford.at>2016-08-29 23:38:05 +0200
committerClifford Wolf <clifford@clifford.at>2016-08-29 23:38:05 +0200
commita6210c06d4c1fef1fb6e72aec7b87a88a6f2f8f4 (patch)
tree01e49f441ddb302522204fa1ab1cc7ef1067c1f6 /README.md
parent517f5ab28b6cf2542c9c11005914a8a9272aa752 (diff)
downloadpicorv32-a6210c06d4c1fef1fb6e72aec7b87a88a6f2f8f4.tar.gz
picorv32-a6210c06d4c1fef1fb6e72aec7b87a88a6f2f8f4.zip
Added picorv32_pcpi_fast_mul core
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1 files changed, 17 insertions, 7 deletions
diff --git a/README.md b/README.md
index 2ebf19a..79c12be 100644
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+++ b/README.md
@@ -85,13 +85,14 @@ You are reading it right now.
This Verilog file contains the following Verilog modules:
-| Module | Description |
-| ----------------------- | ------------------------------------------------------------- |
-| `picorv32` | The PicoRV32 CPU |
-| `picorv32_axi` | The version of the CPU with AXI4-Lite interface |
-| `picorv32_axi_adapter` | Adapter from PicoRV32 Memory Interface to AXI4-Lite |
-| `picorv32_pcpi_mul` | A PCPI core that implements the `MUL[H[SU|U]]` instructions |
-| `picorv32_pcpi_div` | A PCPI core that implements the `DIV[U]/REM[U]` instructions |
+| Module | Description |
+| ------------------------ | --------------------------------------------------------------------- |
+| `picorv32` | The PicoRV32 CPU |
+| `picorv32_axi` | The version of the CPU with AXI4-Lite interface |
+| `picorv32_axi_adapter` | Adapter from PicoRV32 Memory Interface to AXI4-Lite |
+| `picorv32_pcpi_mul` | A PCPI core that implements the `MUL[H[SU|U]]` instructions |
+| `picorv32_pcpi_fast_mul` | A version of `picorv32_pcpi_fast_mul` using a single cycle multiplier |
+| `picorv32_pcpi_div` | A PCPI core that implements the `DIV[U]/REM[U]` instructions |
Simply copy this file into your project.
@@ -229,6 +230,15 @@ This parameter internally enables PCPI and instantiates the `picorv32_pcpi_mul`
core that implements the `MUL[H[SU|U]]` instructions. The external PCPI
interface only becomes functional when ENABLE_PCPI is set as well.
+#### ENABLE_FAST_MUL (default = 0)
+
+This parameter internally enables PCPI and instantiates the `picorv32_pcpi_fast_mul`
+core that implements the `MUL[H[SU|U]]` instructions. The external PCPI
+interface only becomes functional when ENABLE_PCPI is set as well.
+
+If both ENABLE_MUL and ENABLE_FAST_MUL are set then the ENABLE_MUL setting
+will be ignored and the fast multiplier core will be instantiated.
+
#### ENABLE_DIV (default = 0)
This parameter internally enables PCPI and instantiates the `picorv32_pcpi_div`