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| author | Clifford Wolf <clifford@clifford.at> | 2016-04-03 17:07:45 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-04-03 17:07:45 +0200 |
| commit | cceed2fbdf4bb96a20dc2267dc8c04cd01df724d (patch) | |
| tree | ae0237e334895472cc242bb8acb008901f3fc11d /README.md | |
| parent | e630bedda4f16d5f061f93879177a2d6b2a66d29 (diff) | |
| parent | 3217152c1bd9384a15242c0f8cb4f9781d6d9afc (diff) | |
| download | picorv32-cceed2fbdf4bb96a20dc2267dc8c04cd01df724d.tar.gz picorv32-cceed2fbdf4bb96a20dc2267dc8c04cd01df724d.zip | |
Merge pull request #5 from neuschaefer/dev
README.md: Document the meaning of mem_instr
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 3 |
1 files changed, 2 insertions, 1 deletions
@@ -299,7 +299,8 @@ that can run one memory transfer at a time: The core initiates a memory transfer by asserting `mem_valid`. The valid signal stays high until the peer asserts `mem_ready`. All core outputs -are stable over the `mem_valid` period. +are stable over the `mem_valid` period. If the memory transfer is an +instruction fetch, the core asserts `mem_instr`. #### Read Transfer |