assembler support for custom0 is deprecated, using cpp macros now

2 files changed, 107 insertions, 43 deletions

diff --git a/firmware/custom_ops.S b/firmware/custom_ops.S
index d8512f6..28bb601 100644
--- a/firmware/custom_ops.S
+++ b/firmware/custom_ops.S
@@ -5,32 +5,96 @@
 // binary, for any purpose, commercial or non-commercial, and by any
 // means.
 
-#define q0 0
-#define q1 1
-#define q2 2
-#define q3 3
-
-.macro getq rd qs
-custom0 \rd,\qs,0,0
-.endm
-
-.macro setq qd rs
-custom0 \qd,\rs,0,1
-.endm
-
-.macro retirq
-custom0 0,0,0,2
-.endm
-
-.macro maskirq rd rs
-custom0 \rd,\rs,0,3
-.endm
-
-.macro waitirq rd
-custom0 \rd,0,0,4
-.endm
-
-.macro timer rd rs
-custom0 \rd,\rs,0,5
-.endm
+#define regnum_q0   0
+#define regnum_q1   1
+#define regnum_q2   2
+#define regnum_q3   3
+
+#define regnum_x0   0
+#define regnum_x1   1
+#define regnum_x2   2
+#define regnum_x3   3
+#define regnum_x4   4
+#define regnum_x5   5
+#define regnum_x6   6
+#define regnum_x7   7
+#define regnum_x8   8
+#define regnum_x9   9
+#define regnum_x10 10
+#define regnum_x11 11
+#define regnum_x12 12
+#define regnum_x13 13
+#define regnum_x14 14
+#define regnum_x15 15
+#define regnum_x16 16
+#define regnum_x17 17
+#define regnum_x18 18
+#define regnum_x19 19
+#define regnum_x20 20
+#define regnum_x21 21
+#define regnum_x22 22
+#define regnum_x23 23
+#define regnum_x24 24
+#define regnum_x25 25
+#define regnum_x26 26
+#define regnum_x27 27
+#define regnum_x28 28
+#define regnum_x29 29
+#define regnum_x30 30
+#define regnum_x31 31
+
+#define regnum_zero 0
+#define regnum_ra   1
+#define regnum_sp   2
+#define regnum_gp   3
+#define regnum_tp   4
+#define regnum_t0   5
+#define regnum_t1   6
+#define regnum_t2   7
+#define regnum_fp   8 // x8 is s0 and also fp
+#define regnum_s0   8
+#define regnum_s1   9
+#define regnum_a0  10
+#define regnum_a1  11
+#define regnum_a2  12
+#define regnum_a3  13
+#define regnum_a4  14
+#define regnum_a5  15
+#define regnum_a6  16
+#define regnum_a7  17
+#define regnum_s2  18
+#define regnum_s3  19
+#define regnum_s4  20
+#define regnum_s5  21
+#define regnum_s6  22
+#define regnum_s7  23
+#define regnum_s8  24
+#define regnum_s9  25
+#define regnum_s10 26
+#define regnum_s11 27
+#define regnum_t3  28
+#define regnum_t4  29
+#define regnum_t5  30
+#define regnum_t6  31
+
+#define r_type_insn(_f7, _rs2, _rs1, _f3, _rd, _opc) \
+.word (((_f7) << 25) | ((_rs2) << 20) | ((_rs1) << 15) | ((_f3) << 12) | ((_rd) << 7) | ((_opc) << 0))
+
+#define picorv32_getq_insn(_rd, _qs) \
+r_type_insn(0b0000000, 0, regnum_ ## _qs, 0b100, regnum_ ## _rd, 0b0001011)
+
+#define picorv32_setq_insn(_qd, _rs) \
+r_type_insn(0b0000001, 0, regnum_ ## _rs, 0b010, regnum_ ## _qd, 0b0001011)
+
+#define picorv32_retirq_insn() \
+r_type_insn(0b0000010, 0, 0, 0b000, 0, 0b0001011)
+
+#define picorv32_maskirq_insn(_rd, _rs) \
+r_type_insn(0b0000011, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
+
+#define picorv32_waitirq_insn(_rd) \
+r_type_insn(0b0000100, 0, 0, 0b100, regnum_ ## _rd, 0b0001011)
+
+#define picorv32_timer_insn(_rd, _rs) \
+r_type_insn(0b0000101, 0, regnum_ ## _rs, 0b110, regnum_ ## _rd, 0b0001011)
 
diff --git a/firmware/start.S b/firmware/start.S
index dda08ed..06d4744 100644
--- a/firmware/start.S
+++ b/firmware/start.S
@@ -34,8 +34,8 @@
 
 reset_vec:
 	// no more than 16 bytes here !
-	waitirq zero
-	maskirq zero, zero
+	picorv32_waitirq_insn(zero)
+	picorv32_maskirq_insn(zero, zero)
 	j start
 
 
@@ -48,19 +48,19 @@ irq_vec:
 
 #ifdef ENABLE_QREGS
 
-	setq q2, x1
-	setq q3, x2
+	picorv32_setq_insn(q2, x1)
+	picorv32_setq_insn(q3, x2)
 
 	lui x1, %hi(irq_regs)
 	addi x1, x1, %lo(irq_regs)
 
-	getq x2, q0
+	picorv32_getq_insn(x2, q0)
 	sw x2,   0*4(x1)
 
-	getq x2, q2
+	picorv32_getq_insn(x2, q2)
 	sw x2,   1*4(x1)
 
-	getq x2, q3
+	picorv32_getq_insn(x2, q3)
 	sw x2,   2*4(x1)
 
 #ifdef ENABLE_FASTIRQ
@@ -180,7 +180,7 @@ irq_vec:
 
 	// arg1 = interrupt type
 #ifdef ENABLE_QREGS
-	getq a1, q1
+	picorv32_getq_insn(a1, q1)
 #else
 	addi a1, tp, 0
 #endif
@@ -196,13 +196,13 @@ irq_vec:
 	addi x1, a0, 0
 
 	lw x2,   0*4(x1)
-	setq q0, x2
+	picorv32_setq_insn(q0, x2)
 
 	lw x2,   1*4(x1)
-	setq q1, x2
+	picorv32_setq_insn(q1, x2)
 
 	lw x2,   2*4(x1)
-	setq q2, x2
+	picorv32_setq_insn(q2, x2)
 
 #ifdef ENABLE_FASTIRQ
 	lw x5,   5*4(x1)
@@ -252,8 +252,8 @@ irq_vec:
 	lw x31, 31*4(x1)
 #endif
 
-	getq x1, q1
-	getq x2, q2
+	picorv32_getq_insn(x1, q1)
+	picorv32_getq_insn(x2, q2)
 
 #else // ENABLE_QREGS
 
@@ -319,7 +319,7 @@ irq_vec:
 
 #endif // ENABLE_QREGS
 
-	retirq
+	picorv32_retirq_insn()
 
 #ifndef ENABLE_QREGS
 .balign 0x200
@@ -378,7 +378,7 @@ start:
 #  define TEST(n) \
 	.global n; \
 	addi x1, zero, 1000; \
-	timer zero, x1; \
+	picorv32_timer_insn(zero, x1); \
 	jal zero,n; \
 	.global n ## _ret; \
 	n ## _ret: