diff options
author | Clifford Wolf <clifford@clifford.at> | 2017-09-19 15:32:41 +0200 |
---|---|---|
committer | Clifford Wolf <clifford@clifford.at> | 2017-09-19 15:32:41 +0200 |
commit | 7639e6ebac26fafbff2c3e2a72e83cf5cd0c3a3e (patch) | |
tree | d344f2a29afb2d11890425ca52e87f5ad6812b88 /picosoc/spiflash.v | |
parent | 2cc1256ce7aab8637d82d91506cdeb73d42604b2 (diff) | |
download | picorv32-7639e6ebac26fafbff2c3e2a72e83cf5cd0c3a3e.tar.gz picorv32-7639e6ebac26fafbff2c3e2a72e83cf5cd0c3a3e.zip |
PicoSoC QSPI and XIP now working (tested in hardware)
Diffstat (limited to 'picosoc/spiflash.v')
-rw-r--r-- | picosoc/spiflash.v | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/picosoc/spiflash.v b/picosoc/spiflash.v index d06f6cd..18cd68d 100644 --- a/picosoc/spiflash.v +++ b/picosoc/spiflash.v @@ -42,6 +42,7 @@ module spiflash ( inout io3 ); localparam verbose = 0; + localparam integer latency = 8; reg [7:0] buffer; integer bitcount = 0; @@ -148,7 +149,7 @@ module spiflash ( if (bytecount == 5) begin xip_cmd = (buffer == 8'h a5) ? spi_cmd : 8'h 00; mode = mode_qspi_wr; - dummycount = 1; + dummycount = latency; end if (bytecount >= 5) begin @@ -173,7 +174,7 @@ module spiflash ( if (bytecount == 5) begin xip_cmd = (buffer == 8'h a5) ? spi_cmd : 8'h 00; mode = mode_qspi_ddr_wr; - dummycount = 1; + dummycount = latency; end if (bytecount >= 5) begin |