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| author | Clifford Wolf <clifford@clifford.at> | 2017-08-11 15:57:42 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2017-08-11 15:57:42 +0200 |
| commit | 78f2f5efd27765820849df4cfca2b9adc7bcb9b5 (patch) | |
| tree | 15a3da231698b09f2c7a15b26d3f81a0289f6925 /picosoc/testbench.v | |
| parent | 53b175d0fb036e114ce28c38831d7756afb834f5 (diff) | |
| download | picorv32-78f2f5efd27765820849df4cfca2b9adc7bcb9b5.tar.gz picorv32-78f2f5efd27765820849df4cfca2b9adc7bcb9b5.zip | |
Add support for QSPI DDR mode, Add SPI MEMIO config reg
Diffstat (limited to 'picosoc/testbench.v')
| -rw-r--r-- | picosoc/testbench.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/picosoc/testbench.v b/picosoc/testbench.v index 6b1cae2..af5b121 100644 --- a/picosoc/testbench.v +++ b/picosoc/testbench.v @@ -78,7 +78,7 @@ module testbench; always @(posedge clk) begin iomem_ready <= 0; - if (iomem_valid && !iomem_ready && iomem_addr[31:24] == 8'h 02) begin + if (iomem_valid && !iomem_ready && iomem_addr[31:24] == 8'h 03) begin iomem_ready <= 1; iomem_rdata <= gpio; if (iomem_wstrb[0]) gpio[ 7: 0] <= iomem_wdata[ 7: 0]; |