Vivado "system" example

1 files changed, 38 insertions, 2 deletions

diff --git a/scripts/vivado/Makefile b/scripts/vivado/Makefile
index f5f6129..3b46bf3 100644
--- a/scripts/vivado/Makefile
+++ b/scripts/vivado/Makefile
@@ -1,8 +1,26 @@
 
-export VIVADO = /opt/Xilinx/Vivado/2015.1/bin/vivado
+VIVADO = /opt/Xilinx/Vivado/2015.1/bin/vivado
+XVLOG = /opt/Xilinx/Vivado/2015.1/bin/xvlog
+XELAB = /opt/Xilinx/Vivado/2015.1/bin/xelab
+GLBL = /opt/Xilinx/Vivado/2015.1/data/verilog/src/glbl.v
+TOOLCHAIN_PREFIX = riscv64-unknown-elf-
+
+export VIVADO
 
 help:
-	@echo "Usage: make {synth_speed|synth_area|synth_soc}"
+	@echo ""
+	@echo "Simple synthesis tests:"
+	@echo "  make synth_area_{small|regular|large}"
+	@echo "  make synth_speed"
+	@echo ""
+	@echo "Example system:"
+	@echo "  make synth_system"
+	@echo "  make sim_system"
+	@echo ""
+	@echo "Timing and Utilization Evaluation:"
+	@echo "  make table.txt"
+	@echo "  make area"
+	@echo ""
 
 synth_%:
 	rm -f $@.log
@@ -11,6 +29,19 @@ synth_%:
 	-grep -B4 -A10 'Slice LUTs' $@.log
 	-grep -B1 -A9 ^Slack $@.log && echo
 
+synth_system: firmware.hex
+
+sim_system:
+	$(XVLOG) system_tb.v synth_system.v
+	$(XVLOG) $(GLBL)
+	$(XELAB) -L unifast_ver -L unisims_ver -R system_tb glbl
+
+firmware.hex: firmware.S firmware.c firmware.lds
+	$(TOOLCHAIN_PREFIX)gcc -Os -m32 -ffreestanding -nostdlib -o firmware.elf firmware.S firmware.c \
+		 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc
+	$(TOOLCHAIN_PREFIX)objcopy -O binary firmware.elf firmware.bin
+	python3 ../../firmware/makehex.py firmware.bin > firmware.hex
+
 tab_%/results.txt:
 	bash tabtest.sh $@
 
@@ -24,3 +55,8 @@ table.txt: tab_small_xc7v_1/results.txt tab_small_xc7v_2/results.txt tab_small_x
 table.txt:
 	bash table.sh > table.txt
 
+clean:
+	rm -rf .Xil/ firmware.bin firmware.elf firmware.hex firmware.map synth_*.log
+	rm -rf synth_*.mmi synth_*.bit synth_system.v table.txt tab_*/ webtalk.jou
+	rm -rf webtalk.log webtalk_*.jou webtalk_*.log xelab.* xsim.* xvlog.*
+