Merge pull request #104 from thoughtpolice/dev

Various touchups to scripts/icestorm demo

3 files changed, 81 insertions, 38 deletions

diff --git a/scripts/icestorm/Makefile b/scripts/icestorm/Makefile
index b86995f..7672b41 100644
--- a/scripts/icestorm/Makefile
+++ b/scripts/icestorm/Makefile
@@ -1,74 +1,104 @@
-
 TOOLCHAIN_PREFIX = riscv32-unknown-elf-
 
+ICE40_SIM_CELLS=$(shell yosys-config --datdir/ice40/cells_sim.v)
+
+# set to 4 for simulation
+FIRMWARE_COUNTER_BITS=18
+
 all: example.bin
 
+## -------------------
+## firmware generation
+
 firmware.elf: firmware.S firmware.c firmware.lds
-	$(TOOLCHAIN_PREFIX)gcc -Os -ffreestanding -nostdlib -o firmware.elf firmware.S firmware.c \
-			--std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug -lgcc
-	chmod -x firmware.elf
+	$(TOOLCHAIN_PREFIX)gcc \
+		-DSHIFT_COUNTER_BITS=$(FIRMWARE_COUNTER_BITS) \
+		-march=rv32i -Os -ffreestanding -nostdlib \
+		-o $@ firmware.S firmware.c \
+		--std=gnu99 -Wl,-Bstatic,-T,firmware.lds,-Map,firmware.map,--strip-debug
+	chmod -x $@
 
 firmware.bin: firmware.elf
-	$(TOOLCHAIN_PREFIX)objcopy -O binary firmware.elf firmware.bin
-	chmod -x firmware.bin
+	$(TOOLCHAIN_PREFIX)objcopy -O binary $< $@
+	chmod -x $@
 
 firmware.hex: firmware.bin
-	python3 ../../firmware/makehex.py firmware.bin 128 > firmware.hex
+	python3 ../../firmware/makehex.py $< 128 > $@
+
+## ------------------------------
+## main flow: synth/p&r/bitstream
 
-synth.blif: example.v ../../picorv32.v firmware.hex
-	yosys -v3 -l synth.log -p 'synth_ice40 -top top -blif $@; write_verilog -attr2comment synth.v' $(filter %.v, $^)
+synth.json: example.v ../../picorv32.v firmware.hex
+	yosys -v3 -l synth.log -p 'synth_ice40 -top top -json $@; write_verilog -attr2comment synth.v' $(filter %.v, $^)
 
-example.asc: synth.blif
-	arachne-pnr -d 8k -o example.asc -p example.pcf synth.blif
+example.asc: synth.json example.pcf
+	nextpnr-ice40 --hx8k --package ct256 --json $< --pcf example.pcf --asc $@
 
 example.bin: example.asc
-	icepack example.asc example.bin
+	icepack $< $@
+
+## -----------------
+## icarus simulation
 
-example_tb.vvp: example_tb.v example.v firmware.hex
-	iverilog -o example_tb.vvp -s testbench example.v example_tb.v ../../picorv32.v
-	chmod -x example_tb.vvp
+example_tb.vvp: example.v example_tb.v ../../picorv32.v firmware.hex
+	iverilog -o $@ -s testbench $(filter %.v, $^)
+	chmod -x $@
 
 example_sim: example_tb.vvp
-	vvp -N example_tb.vvp
+	vvp -N $<
 
 example_sim_vcd: example_tb.vvp
-	vvp -N example_tb.vvp +vcd
+	vvp -N $< +vcd
 
-synth_tb.vvp: example_tb.v synth.blif
-	iverilog -o synth_tb.vvp -s testbench synth.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v`
-	chmod -x synth_tb.vvp
+## ---------------------
+## post-synth simulation
+
+synth_tb.vvp: example_tb.v synth.json
+	iverilog -o $@ -s testbench synth.v example_tb.v $(ICE40_SIM_CELLS)
+	chmod -x $@
 
 synth_sim: synth_tb.vvp
-	vvp -N synth_tb.vvp
+	vvp -N $<
 
 synth_sim_vcd: synth_tb.vvp
-	vvp -N synth_tb.vvp +vcd
+	vvp -N $< +vcd
+
+## ---------------------
+## post-route simulation
 
-route.v: example.asc
-	icebox_vlog -L -n top -sp example.pcf example.asc > route.v
+route.v: example.asc example.pcf
+	icebox_vlog -L -n top -sp example.pcf $< > $@
 
-route_tb.vvp: example_tb.v route.v
-	iverilog -o route_tb.vvp -s testbench route.v example_tb.v `yosys-config --datdir/ice40/cells_sim.v`
-	chmod -x route_tb.vvp
+route_tb.vvp: route.v example_tb.v
+	iverilog -o $@ -s testbench $^ $(ICE40_SIM_CELLS)
+	chmod -x $@
 
 route_sim: route_tb.vvp
-	vvp -N route_tb.vvp
+	vvp -N $<
 
 route_sim_vcd: route_tb.vvp
-	vvp -N route_tb.vvp +vcd
+	vvp -N $< +vcd
+
+## ---------------------
+## miscellaneous targets
 
-prog_sram:
-	iceprog -S example.bin
+prog_sram: example.bin
+	iceprog -S $<
 
-view:
-	gtkwave example.vcd example.gtkw
+timing: example.asc example.pcf
+	icetime -c 62 -tmd hx8k -P ct256 -p example.pcf -t $<
+
+view: example.vcd
+	gtkwave $< example.gtkw
+
+## ------
+## el fin
 
 clean:
 	rm -f firmware.elf firmware.map firmware.bin firmware.hex
-	rm -f synth.log synth.v synth.blif route.v example.asc example.bin
+	rm -f synth.log synth.v synth.json route.v example.asc example.bin
 	rm -f example_tb.vvp synth_tb.vvp route_tb.vvp example.vcd
 
 .PHONY: all prog_sram view clean
-.PHONY: example_sim synth_sim route_sim
+.PHONY: example_sim synth_sim route_sim timing
 .PHONY: example_sim_vcd synth_sim_vcd route_sim_vcd
-
diff --git a/scripts/icestorm/firmware.c b/scripts/icestorm/firmware.c
index a5e5236..80a4661 100644
--- a/scripts/icestorm/firmware.c
+++ b/scripts/icestorm/firmware.c
@@ -1,7 +1,8 @@
 #include <stdint.h>
 
-// use SHIFT_COUNTER_BITS=4 for simulation
-#define SHIFT_COUNTER_BITS 18
+#ifndef SHIFT_COUNTER_BITS
+#error SHIFT_COUNTER_BITS must be defined as 4 (for simulation) or 18 (for hardware bitstreams)!
+#endif
 
 void output(uint8_t c)
 {
diff --git a/scripts/icestorm/readme.md b/scripts/icestorm/readme.md
new file mode 100644
index 0000000..101391f
--- /dev/null
+++ b/scripts/icestorm/readme.md
@@ -0,0 +1,12 @@
+To build the example LED-blinking firmware for an HX8K Breakout Board and get
+a timing report (checked against the default 12MHz oscillator):
+
+    $ make clean example.bin timing
+
+To run all the simulation tests:
+
+    $ make clean example_sim synth_sim route_sim FIRMWARE_COUNTER_BITS=4
+
+(You must run the `clean` target to rebuild the firmware with the updated
+`FIRMWARE_COUNTER_BITS` parameter; the firmware source must be recompiled for
+simulation vs hardware, but this is not tracked as a Makefile dependency.)