1 files changed, 1 insertions, 0 deletions

diff --git a/README.md b/README.md
index c585984..30dc67d 100644
--- a/README.md
+++ b/README.md
@@ -91,6 +91,7 @@ This Verilog file contains the following Verilog modules:
 | `picorv32_axi`          | The version of the CPU with AXI4-Lite interface               |
 | `picorv32_axi_adapter`  | Adapter from PicoRV32 Memory Interface to AXI4-Lite           |
 | `picorv32_pcpi_mul`     | A PCPI core that implements the `MUL[H[SU|U]]` instructions   |
+| `picorv32_pcpi_div`     | A PCPI core that implements the `DIV[U]/REM[U]` instructions  |
 
 Simply copy this file into your project.