diff options
| -rw-r--r-- | README.md | 5 | ||||
| -rw-r--r-- | picosoc/.gitignore (renamed from spiflash/.gitignore) | 0 | ||||
| -rw-r--r-- | picosoc/Makefile (renamed from spiflash/Makefile) | 6 | ||||
| -rw-r--r-- | picosoc/README.md (renamed from spiflash/README.md) | 6 | ||||
| -rw-r--r-- | picosoc/firmware.s (renamed from spiflash/firmware.s) | 0 | ||||
| -rw-r--r-- | picosoc/picosoc.v (renamed from spiflash/top.v) | 4 | ||||
| -rw-r--r-- | picosoc/pinout.pcf (renamed from spiflash/pinout.pcf) | 0 | ||||
| -rw-r--r-- | picosoc/spiflash.v (renamed from spiflash/spiflash.v) | 2 | ||||
| -rw-r--r-- | picosoc/spiflash_tb.v (renamed from spiflash/spiflash_tb.v) | 2 | ||||
| -rw-r--r-- | picosoc/spimemio.v (renamed from spiflash/spimemio.v) | 2 | ||||
| -rw-r--r-- | picosoc/testbench.v (renamed from spiflash/testbench.v) | 4 |
11 files changed, 18 insertions, 13 deletions
@@ -128,6 +128,11 @@ Simple instruction-level tests from [riscv-tests](https://github.com/riscv/riscv Another simple test firmware that runs the Dhrystone benchmark. +#### picosoc/ + +A simple example SoC using PicoRV32 that can execute code directly from a +memory mapped SPI flash. + #### scripts/ Various scripts and examples for different (synthesis) tools and hardware architectures. diff --git a/spiflash/.gitignore b/picosoc/.gitignore index e88e84f..e88e84f 100644 --- a/spiflash/.gitignore +++ b/picosoc/.gitignore diff --git a/spiflash/Makefile b/picosoc/Makefile index 7bb244c..1436321 100644 --- a/spiflash/Makefile +++ b/picosoc/Makefile @@ -2,7 +2,7 @@ testbench: testbench.vvp firmware.hex vvp -N $< -testbench.vvp: spiflash.v spimemio.v testbench.v top.v ../picorv32.v +testbench.vvp: spiflash.v spimemio.v testbench.v picosoc.v ../picorv32.v iverilog -s testbench -o $@ $^ spiflash_tb: spiflash_tb.vvp firmware.hex @@ -27,8 +27,8 @@ firmware.hex: firmware_vma.elf firmware.bin: firmware.elf riscv32-unknown-elf-objcopy -O binary firmware.elf firmware.bin -design.blif: spimemio.v top.v ../picorv32.v - yosys -ql design.log -p 'synth_ice40 -top top -blif design.blif' $^ +design.blif: spimemio.v picosoc.v ../picorv32.v + yosys -ql design.log -p 'synth_ice40 -top picosoc -blif design.blif' $^ design.asc: pinout.pcf design.blif arachne-pnr -d 8k -o design.asc -p pinout.pcf design.blif diff --git a/spiflash/README.md b/picosoc/README.md index e141ea2..bf3bff6 100644 --- a/spiflash/README.md +++ b/picosoc/README.md @@ -1,6 +1,6 @@ -PicoRV32 SPI-Flash Demo -======================= +PicoSoC - A simple example SoC using PicoRV32 +============================================= This is a simple PicoRV32 example design that can run code directly from an SPI flash chip. This example design uses the Lattice iCE40-HX8K Breakout Board. @@ -18,7 +18,7 @@ and upload them to a connected iCE40-HX8K Breakout Board. | File | Description | | --------------------------- | --------------------------------------------------------------- | -| [top.v](top.v) | Top-level Verilog module for the design | +| [picosoc.v](picosoc.v) | Top-level Verilog module for the design | | [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash | | [spiflash.v](spiflash.v) | Simulation model of an SPI flash (used by testbench.v) | | [testbench.v](testbench.v) | Simple test bench for the design (requires firmware.hex). | diff --git a/spiflash/firmware.s b/picosoc/firmware.s index 9b12f0c..9b12f0c 100644 --- a/spiflash/firmware.s +++ b/picosoc/firmware.s diff --git a/spiflash/top.v b/picosoc/picosoc.v index beb442c..d1b01dd 100644 --- a/spiflash/top.v +++ b/picosoc/picosoc.v @@ -1,5 +1,5 @@ /* - * Top-level for "spiflash" SoC demo + * PicoSoC - A simple example SoC using PicoRV32 * * Copyright (C) 2017 Clifford Wolf <clifford@clifford.at> * @@ -17,7 +17,7 @@ * */ -module top ( +module picosoc ( input clk, output trap, diff --git a/spiflash/pinout.pcf b/picosoc/pinout.pcf index dea0376..dea0376 100644 --- a/spiflash/pinout.pcf +++ b/picosoc/pinout.pcf diff --git a/spiflash/spiflash.v b/picosoc/spiflash.v index c42bd3b..c1e9615 100644 --- a/spiflash/spiflash.v +++ b/picosoc/spiflash.v @@ -1,5 +1,5 @@ /* - * A simple simulation model for an SPI flash + * PicoSoC - A simple example SoC using PicoRV32 * * Copyright (C) 2017 Clifford Wolf <clifford@clifford.at> * diff --git a/spiflash/spiflash_tb.v b/picosoc/spiflash_tb.v index b739045..769a3a0 100644 --- a/spiflash/spiflash_tb.v +++ b/picosoc/spiflash_tb.v @@ -1,5 +1,5 @@ /* - * A simple test bench for the SPI flash simulation model + * PicoSoC - A simple example SoC using PicoRV32 * * Copyright (C) 2017 Clifford Wolf <clifford@clifford.at> * diff --git a/spiflash/spimemio.v b/picosoc/spimemio.v index 0bb3d18..6bb4ea6 100644 --- a/spiflash/spimemio.v +++ b/picosoc/spimemio.v @@ -1,5 +1,5 @@ /* - * Interface module for SPI flash and PicoRV32 native memory interface + * PicoSoC - A simple example SoC using PicoRV32 * * Copyright (C) 2017 Clifford Wolf <clifford@clifford.at> * diff --git a/spiflash/testbench.v b/picosoc/testbench.v index f3f449e..47cef3e 100644 --- a/spiflash/testbench.v +++ b/picosoc/testbench.v @@ -1,5 +1,5 @@ /* - * Test bench for the "spiflash" SoC + * PicoSoC - A simple example SoC using PicoRV32 * * Copyright (C) 2017 Clifford Wolf <clifford@clifford.at> * @@ -51,7 +51,7 @@ module testbench; end end - top uut ( + picosoc uut ( .clk (clk ), .gpio_i (gpio_i ), .gpio_o (gpio_o ), |