| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| | * | Update PicoSoC hx8kdemo | Clifford Wolf | 2017-09-15 | 2 | -10/+40 | |
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| | * | Improve picosoc firmware build process | Clifford Wolf | 2017-09-15 | 3 | -10/+9 | |
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| | * | Update picosoc/hx8kdemo_tb.v | Clifford Wolf | 2017-09-15 | 1 | -1/+1 | |
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| | * | Update picosoc memory map | Clifford Wolf | 2017-09-15 | 2 | -4/+7 | |
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| * | Add "make test_rvf" | Clifford Wolf | 2017-09-13 | 3 | -34/+48 | |
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| * | Add correct interupt handling in RVFI trace | Clifford Wolf | 2017-09-13 | 1 | -16/+49 | |
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| * | Add rvfi_halt and rvfi_intr to picorv32_axi and picorv32_wb | Clifford Wolf | 2017-09-13 | 1 | -0/+8 | |
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| * | Revert "Fix RISCV_FORMAL_BLACKBOX_REGS (broke liveness on branch ops)" | Clifford Wolf | 2017-09-13 | 1 | -10/+10 | |
| | | | | | This reverts commit 624bc05f989e3fdb3ca499d71a1705d0aac569c5. | |||||
| * | Add Cypress S25FL128L datasheet link to picosoc/spiflash.v | Clifford Wolf | 2017-09-12 | 1 | -0/+1 | |
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| * | Fix RISCV_FORMAL_BLACKBOX_REGS (broke liveness on branch ops) | Clifford Wolf | 2017-09-12 | 1 | -10/+10 | |
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| * | Update rvfi_order according to current rvfi spec | Clifford Wolf | 2017-09-05 | 1 | -4/+4 | |
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| * | Add simple UART to PicoSoC | Clifford Wolf | 2017-08-11 | 7 | -7/+222 | |
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| * | Improve and cleanup picosoc firmware | Clifford Wolf | 2017-08-11 | 5 | -20/+40 | |
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| * | Add support for QSPI DDR mode, Add SPI MEMIO config reg | Clifford Wolf | 2017-08-11 | 6 | -39/+170 | |
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| * | Add spimemio QSPI support | Clifford Wolf | 2017-08-11 | 1 | -42/+134 | |
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| * | Fix bug in picosoc spimemio and some cleanups in hx8kdemo | Clifford Wolf | 2017-08-08 | 3 | -18/+29 | |
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| * | Major rewrite of picosoc spimemio core | Clifford Wolf | 2017-08-07 | 5 | -81/+410 | |
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| * | Refactor picosoc flash_io interfaces | Clifford Wolf | 2017-08-07 | 5 | -97/+131 | |
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| * | Refactor picosoc code | Clifford Wolf | 2017-08-07 | 9 | -171/+316 | |
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| * | Rename "spiflash" example to "picosoc" | Clifford Wolf | 2017-08-07 | 11 | -13/+18 | |
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| * | Add spiflash testbench and add support for QSPI and DDR QSPI to SPI flash ↵ | Clifford Wolf | 2017-08-05 | 4 | -26/+609 | |
| | | | | | sim model | |||||
| * | Change spiflash pin interfaces to support quad SPI | Clifford Wolf | 2017-08-04 | 5 | -51/+156 | |
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| * | Improve spiflash testbench and firmware | Clifford Wolf | 2017-07-29 | 3 | -22/+80 | |
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| * | Add prefetching to spimemio | Clifford Wolf | 2017-07-29 | 1 | -1/+18 | |
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| * | Update spiflash README | Clifford Wolf | 2017-07-29 | 2 | -18/+27 | |
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| * | Add spiflash example project | Clifford Wolf | 2017-07-29 | 9 | -0/+454 | |
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| * | Update README | Clifford Wolf | 2017-07-29 | 1 | -3/+9 | |
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| * | Add testbench_ez | Clifford Wolf | 2017-07-27 | 4 | -4/+100 | |
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| * | Update vivado evaluations | Clifford Wolf | 2017-07-20 | 4 | -39/+53 | |
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| * | Suppress writes to cpuregs[0] to prevent confusion | Clifford Wolf | 2017-07-14 | 1 | -2/+2 | |
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| * | Fix scripts/torture gcc calls | Clifford Wolf | 2017-07-10 | 2 | -2/+2 | |
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| * | Remove some trailing whitespace | Larry Doolittle | 2017-06-13 | 9 | -11/+11 | |
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| * | Add rvfi_halt and rvfi_intr ports | Clifford Wolf | 2017-06-06 | 1 | -0/+4 | |
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| * | Add RVFI to AXI and WB wrappers modules, Add RVFI monitor support to test bench | Clifford Wolf | 2017-05-27 | 3 | -3/+146 | |
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| * | Fixed jalr, c_jalr, and c_jr insns (bug discovered by riscv-formal) | Clifford Wolf | 2017-05-18 | 1 | -2/+2 | |
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| * | Fix decoding of C.ADDI instruction | Clifford Wolf | 2017-05-13 | 1 | -5/+3 | |
| | | | | | | See https://groups.google.com/a/groups.riscv.org/forum/#!topic/isa-dev/mr3H6S6IIts for discussion. There was a bug in the ISA manual. | |||||
| * | Add riscv-formal alu/regs blackboxing | Clifford Wolf | 2017-05-11 | 1 | -0/+14 | |
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| * | Fix decoding of illegal/reserved opcodes as other valid opcodes | Clifford Wolf | 2017-05-07 | 1 | -21/+29 | |
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| * | Update riscv-gnu-toolchain to git rev 4e51f26 | Clifford Wolf | 2017-05-05 | 2 | -3/+3 | |
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| * | Update riscv-gnu-toolchain to git rev 0c8f87d | Clifford Wolf | 2017-04-07 | 4 | -13/+14 | |
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| * | Merge pull request #40 from open-design/20170406.wishbone | Clifford Wolf | 2017-04-07 | 2 | -9/+25 | |
| |\ | | | | | testbench_wb.v: unify verbose output with axi testbench | |||||
| | * | testbench_wb.v: unify verbose output with axi testbench | Antony Pavlov | 2017-04-06 | 2 | -9/+25 | |
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unification of testbench output makes it possible to use the diff utility for comparing testbench instruction traces. Alas the testbench and testbench_wb traces are differ because of interrupts, e.g. picorv32$ make testbench_wb.vvp iverilog -o testbench_wb.vvp -DCOMPRESSED_ISA -DRISCV_FORMAL testbench_wb.v picorv32.v chmod -x testbench_wb.vvp picorv32$ make testbench.vvp iverilog -o testbench.vvp -DCOMPRESSED_ISA -DRISCV_FORMAL testbench.v picorv32.v chmod -x testbench.vvp picorv32$ vvp -N testbench_wb.vvp +verbose | head -n 856 > /tmp/testbench_wb.log picorv32$ vvp -N testbench.vvp +verbose | head -n 856 > /tmp/testbench.log picorv32$ diff -u /tmp/testbench.log /tmp/testbench_wb.log --- /tmp/testbench.log 2017-04-06 06:56:06.079804549 +0300 +++ /tmp/testbench_wb.log 2017-04-06 06:55:58.763485130 +0300 @@ -850,7 +850,7 @@ RD: ADDR=000056a0 DATA=00000013 INSN RD: ADDR=000056a4 DATA=fff00113 INSN RD: ADDR=000056a8 DATA=00000013 INSN -RD: ADDR=000056ac DATA=14208463 INSN <--- testbench: no interrupt -RD: ADDR=000056b0 DATA=00120213 INSN -RD: ADDR=000056b4 DATA=00200293 INSN -RD: ADDR=000056b8 DATA=fe5212e3 INSN +RD: ADDR=00000010 DATA=0200a10b INSN <--- testbench_wb: interrupt +RD: ADDR=00000014 DATA=0201218b INSN +RD: ADDR=00000018 DATA=000000b7 INSN +RD: ADDR=0000001c DATA=16008093 INSN Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> | |||||
| * | Merge pull request #39 from open-design/20170324.wishbone | Clifford Wolf | 2017-03-24 | 1 | -96/+11 | |
| |\ | | | | | testbench_wb.v: drop unused stuff | |||||
| | * | testbench_wb.v: drop unused stuff | Antony Pavlov | 2017-03-17 | 1 | -96/+11 | |
| |/ | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> | |||||
| * | Add GIT_ENV Makefile variable (for things like http proxy settings) | Clifford Wolf | 2017-03-15 | 1 | -2/+5 | |
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| * | Merge pull request #37 from open-design/20170315.testbenches | Clifford Wolf | 2017-03-15 | 3 | -20/+19 | |
| |\ | | | | | 20170315.testbenches | |||||
| | * | Makefile: use automatic variables in testbench rules | Antony Pavlov | 2017-03-15 | 1 | -10/+10 | |
| | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> | |||||
| | * | testbench.v: fix whitespaces | Antony Pavlov | 2017-03-15 | 1 | -2/+2 | |
| | | | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> | |||||
| | * | testbench_wb.v: fix output stuff | Antony Pavlov | 2017-03-15 | 1 | -8/+7 | |
| |/ | | | | | | | | | | | | | | | This patch fixes wishbone testbench output issue: 'DNNE' instead of 'DONE', i.e. Cycle counter ......... 546536 Instruction counter .... 69770 CPI: 7.83 DNNE ------------------------------------------------------------ EBREAK instruction at 0x000006C4 Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> | |||||
| * | Merge branch 'wishbone' | Clifford Wolf | 2017-03-14 | 4 | -3/+548 | |
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| Fork of https://github.com/YosysHQ/picorv32. |
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