picorv32 - Fork of https://github.com/YosysHQ/picorv32.

	Commit message (Collapse)	Author	Age	Files	Lines
*	Improve test firmware, increase testbench memory size to 128kB	Clifford Wolf	2019-09-12	1	-1/+31
\| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
*	assembler support for custom0 is deprecated, using cpp macros now	Clifford Wolf	2016-12-09	1	-15/+15
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*	Added tracer support (under construction)	Clifford Wolf	2016-08-25	1	-0/+4
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*	RISC-V ISA 2.1 now calls "sbreak" officially "ebreak"	Clifford Wolf	2016-06-06	1	-3/+3
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*	Added ENABLE_DIV and picorv32_pcpi_div	Clifford Wolf	2016-04-10	1	-0/+5
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*	Added ENABLE_FASTIRQ switch in start.S	Clifford Wolf	2016-01-21	1	-0/+83
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*	Removed trailing whitespaces	Clifford Wolf	2015-07-02	1	-1/+1
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*	Added ENABLE_IRQ_QREGS and ENABLE_IRQ_TIMER	Clifford Wolf	2015-06-28	1	-0/+96
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*	Improved start.S IRQ code	Clifford Wolf	2015-06-28	1	-3/+8
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*	Fixed typo in firmware/start.S	Clifford Wolf	2015-06-28	1	-1/+1
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*	Improvements in picorv32_pcpi_mul	Clifford Wolf	2015-06-28	1	-0/+4
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*	Improved IRQ documentation, added assembler macros	Clifford Wolf	2015-06-28	1	-37/+58
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*	Added ENABLE defines for individual tests	Clifford Wolf	2015-06-27	1	-6/+25
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*	Added mul tests from riscv-tests	Clifford Wolf	2015-06-27	1	-0/+5
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*	Added Pico Co-Processor Interface (PCPI)	Clifford Wolf	2015-06-26	1	-0/+24
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*	Implemented waitirq instruction	Clifford Wolf	2015-06-26	1	-1/+2
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*	Refactoring of IRQ handling	Clifford Wolf	2015-06-26	1	-1/+1
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*	Added basic IRQ support	Clifford Wolf	2015-06-25	1	-1/+162
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*	Major redesign of main FSM	Clifford Wolf	2015-06-07	1	-1/+0
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*	Initial import	Clifford Wolf	2015-06-06	1	-0/+80